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Electronics & Communication Engineering

Faculty

Dr. Chantigari V K Reddy, Director
 Mr PANATI S SRINIVAS REDDY HOD
QualificationM.E, Ph.D
Email Iddirector@nnrg.edu.in
Experience25 years
Professional MembershipsI) MIEEE

II) Fellow IETE

III) MISTE
Administrative Assignments

I) Director, Nalla Narasimha Reddy Education Society’s Group of Institutions, Hyderabad, Sept 2011- till date


II) Dean, School of Engineering, NNRESGI from July 2010-Aug 2011


III) Principal,VSM Engg. College, Hyderabad May 2008- April 2010


IV) Head of ECE dept , KITS Warangal, Since April 2005 to May2008


V) Hony Secretary IETE Warangal Sub Centre ,2003-2008


VI) Chairman IETE Warangal Sub Centre, 2008-10


VII) Member, BOS EIE,ECE,Kakatiya University , 2003-2007


VIII) Chairman , Board of Studies ECE , Kakatiya University, Warangal-2007-2008


IX. Counsel member IETE (co-opted) 2012-2014

Education InformationI) Ph.D. (ECE) form JNTU, Hyderabad, June 2008.

II) M.E. (Applied Electronics) from PSG College of Tech., Bharathiyar university Coimbatore, 1996.

III) GATE - 95.32

IV) B.Tech. (ECE) from RVR&JC College of Engineering, .(N.U , Guntur) 1989.
Courses Attended

I) 5day FDP on Analog CMOS VLSI Design using Cadence Tools Organized by Entuple, Bangalore from Dec7-11.2015



II) 5Days International conference on VLSI Design-2008 and Tutorials at Hyderabad , conducted by VLSI Society of India



III) 5 Days International conference on VLSI Design-2006 and Tutorials at Hyderabad , conducted by VLSI Society of India



IV) One week work shop on DSP Tools and Practice ,IIT, Kharagpur, June 2006



V) One Week work shop on VLSI Design ,Conducted by VLSI Society of India ,Mysore, May 2005



VI) 5 Days International conference on VLSI Design-2005 and Tutorials at Kolkata , conducted by VLSI Society of India



VII) 2Week STTP on DSPAA at NIT, Warangal (Mar 2004)



VIII) 3 Day workshop on Microprocessors and Microcontrollers, GNITS, Hyderabad (Dec2003)



IX) 2Week STTP on VLSI design at REC, Warangal(Oct 02)



X) 3 day Workshop on VLSI design at ISSCT Hyderabad(Jan 01)



XI) 2 Week STTP on High speed Networks at REC Wgl(Oct 99)

Guest lecturers delivered

I) High level over view of VLSI Design at Vagdevi Engg. Colllege, Warangal, 29th March,2008



II) Analog IC Design, UGC refresher course on VLSI design and Embedded systems at Academic Staff College ,JNTU ,Hyderabad 28,29Dec 2007



III) Layout design rules at UGC refresher course on VLSI design and Embedded systems at Academic Staff College ,JNTU ,Hyderabad Dec 2005



IV) Layout design rules at UGC refresher course on VLSI design and Embedded systems at Academic Staff College ,JNTU ,Hyderabad.23rd Nov' 2004



V) Micro Controllers Architecture &Programming at AICTE- ISTE -STTP on Mcro Controllers and its Applications ,KITS, warangal 7th,8th,9th June 2004



VI) Design rules at VLSI Design workshop at GNITS, Hyderabad on 15thDec'04



VII) VHDL at VHDL work shop at KITS ,Warangal 17th & 18th Feb '2003

Publications-Journals

I) Design of STT-RAM cell in 45nm hybrid CMOS/MTJ Int. Jou. Of Science and Engg Applications ISSN-2319-7560 (Vol.3 Issue 3 May-June2014 Pp 49-52



II) An Alternative Logic Approach to Implement Energy Efficient 90-Nm CMOS full adders Int Jou of Scientific research ISSN 2277-8179Vol 2 Issue 10 Oct Pp 70-73



III) Design of an Efficient Reversible Logic Based Bidirectional Barrel shifter International Journal of Electronics Signals and systems (IJESS) ISSN: 2231-5969 Vol-2, 2,3,4,, 2012, p.p.No. 48-53.



IV) Optimum Decimation and Filtering for reconfigurable Sigma Delta ADC Far East Journal of Electronics and Communications ISSN 0973-7006Volume 11, Issue2Dec 2013 Pages 101 - 111



V) An Alternative Logic Approach to Implement Energy Efficient 90-nM CMOS Full Adders International Journal of Scientific Research(IJSR)ISSN 2277-8179Vol. 2Oct 2013Pp 1-3



VI) An Improved Optimization Techniques for Parallel Prefix Adder using FPGA .Techniques for Parallel Prefix Adder using FPGA International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol. 3, Issue. 5, Sep - Oct. 2013 pp-3107-3115 ISSN: 2249-6645 International Journal of Modern Engineering Research (IJMER) ISSN: 2249-6645 Vol.3 issue 5 2013 pp-3107-3115



VII) A Novel Architecture of LUT Design Optimization for DSP Applications International Journal of Advanced Electrical and Electronics Engineering, ISSN (Print): 2278-8948Vol.-1, Issue-22012 p.p No 1-6



VIII) Analysis on Digital Implementation of Sigma-Delta ADC with passive analog components International Journal of Computing and Digital systems: ISSN 2210-142XVol. 2 2013 Pp 71-77



IX) Design and Implementation of Reversible Logic Based Bidirectional Barrel Shifter 978-1-4673- 2396- 3/12 IEEE-ICSE2012 Proc., 2012, Kuala Lumpur, Malaysia.2012 p.p. 490-494



X) Design of Low power high speed segmented DAC Technology Spectrum, Journal of JNTU, Vol..2,No.3June 2008



XI) Power Optimization in Flash ADCs "Far East International Journal of EC ISSN 0973 –7006,Vol.No.3,Dec2008



XII) Design and Simulation of Voltage to Current Converter, "Technology Spectrum, Journal of JNTU,Vol. 1, No.2 , July 2007



XIII) Design and Simulation of Differential Mode CMOS Voltage to Current Converter LE Journal of Laboratory experiments Vol. 7,NO.3Sept2007 pp 220-224

Conferences

I) A Novel Approach or Design and Implementation of Sequential Multiplier, International conference on Challenges and Emerging trends in Management&Technology-2015, NNRES, Hyderabad on 12th Dec, 2015.



II) Selecting Low power High speed Differential I/o for Continuous Time Sigma Delta ADC on VIRTEX-4 FPGA, International conference on Challenges and Emerging trends in Management&Technology-2015, NNRES, Hyderabad on 12th Dec, 2015.



III) H-spice modeling FPGA Low voltage Differential I/Os:LVDS,HSL-Ii and LVPECL for SD-ADC, International conference on Advanced Communications, VLSI and Signal Processing, 11th April2015 , G Pullaiah college of Engineering& Technology.



IV) Design and Implementation of Area optimized AES with S-Box Resource sharing based on FPGA IETE Zonal seminar cum National symposium, Hyderabad28-30March 2014



V) A Novel Architecture of LUT Design optimization for DSP Applications." International conference on Electrical Electronics & Computer Science, ISBN: 987-9381361-17-7,28th August, 2012, GOA, p.p. No. 17-22



VI) Design of An Efficient Reversible Logic Based Bidirectional Barrel shifter", International Conference in Electronics and Communication Engineering, ISBN: 978-93-81693-29-2, 20th May 2012, Bangalore p.p.No. 108-114.



VII) Low Power Design of Asynchronous protocol Converters for Two-phase Communications" day National Conference on Recent Trends and Advances in Nano Technology, Guru Nanak Engineering College, Hyderabad.. 29th July, 2011



VIII) 65dB SFDR, 500kS/s Continuous time All Digital Sigma Delta ADC for SONOR Applications Peer jubilee international conference on Navigation and Communication NAVCOM2012 Hyderabad Dec 20-21. 2012328-331



IX) High Speed differential amplifier based comparator for future FPGA/ASIC integrated sigma Delta ADC IEEE ICARETFeb8-9th 2013,365-369



X) Performance Analysis of First order Digital Sigma Delta ADC 4th International conference on computational Intelligence, Communication systems and Netwotks978-0-7695-821CICSyN0/12@2012 IEEE 2012 435-440



XI) A New Frame Work on Novel Area Efficient FPGA Architecture for FIR Filtering with Symmetric Signal Extension, International conference on Advances in computing, communication and information Technologies ACCIT-2010, Dec 2010 ,Bangalore



XII) Techniques to reduce power consumption in memories National level Symposium , Bhoj Reddy College of Engg . Hyderabad, Feb 2003



XIII) Performance Review of CMOS ADCs, National Conference, NCVRGwalior (Feb'04)



XIV) A technique to reduce power consumption in Flash ADCs 4.National conference NCAC ,PSG College of Tech Coimbatore Dec 2005



XV) Design and simulation of CMOS Voltage to current converter IETE Zonal seminar, Vishakapatnam Feb 2007



XVI) Design of low power CMOS transconductor6.,International Conference on simulation and modeling,CIT, Coimbatore, Aug - 2007



XVII) Design of Low power high speed segmented DAC,7International Conference on simulation and modeling ,CIT, Coimbatore, Aug 2007

Dr. M A KHADAR BABA, Professor & Head of the Department
Dr. M A KHADAR BABA ece hod
QualificationB.E(ECE), M.E(ECE), Ph D
Email Idabdul2805@gmail.com
Experience28 Years
Administrative Assignments:

Head of ECE Department GNI Technical Campus Since June 2015 to August 2017.
Head of ECE Department CMRCET Since November 2011 to May 2015.
Head of ECE Department GNEC Since July 2008 to October 2010.
Chairman, Board of studies ECE, CMRCET Hyderabad during 2014-15.
Member, Board of studies ECE, GNITC Hyderabad during 2015-17.


Education Information•Ph D (ECE) from GITAM University, Visakhapatnam.
•M.E. (ECE) from College of Engineering, Osmania University, Hyderabad
•B.E (ECE) from Deccan College of Engineering (OU), Hyderabad.
Courses / Workshops Attended:1. “Smart Antennas for Wireless Communications” at NERTU, Osmania University, 16th December, 2002.
2. “Workshop on Latest Technologies in Electronic Communications (WOLTEC -05)” MVGR college of Engineering, Vijayanagaram, Andhra Pradesh, during 12th& 13th March, 2005.
3. “Analog Integrated Circuit Design” National Institute of Technology, Warangal, Andhra Pradesh, 26th June 2006 to 1st July 2006.
4. Workshop on “TCP/IP Networks &Protocols” JNTUHyderabad, during 6th to 8th December, 2006.
5. Workshop on “VLSI - Chip Design” Guru Nanak Engineering College, Hyderabad, during 4th& 5th September 2008.
6. Workshop on “Teaching Engineering Using LABVIEW” CMR College of Engineering &Technology, Hyderabad, during 22nd to 24th June 2011.
Conferences/ Workshops/ Refresher courses conducted:1. Coordinators - short term Course on “Microwave Techniques”, at SNIST Hyderabad during October 9th to 11th, 2006.
2. Convener - 1st international conference conducted from 10thto13th June 2010, at Guru Nanak Engineering College, Hyderabad.
3. Coordinator - National Conference, at CMR College of Engineering & Technology, during 8th to 10th July 2011.
4. Convener - National Conference at CMR College of Engineering &Technology during 24th& 25th January 2014.
5. Convener - Two-day workshop in VLSI design during 4-5th September 2008, at Guru Nanak Engineering College, Hyderabad.
6. Convener - workshop on “CADENCE Tools” during 12th to 14th July 2012 at CMR college of Engineering & Technology, Hyderabad.
7. Convener - workshop on “Simulation Lab using MATLAB” during 16th to 18th, August 2012 at CMR college of Engineering & Technology, Hyderabad.
8. Convener - Faculty Development Programme on “Embedded Systems” 07th to 09th August, 2013, CMR college of Engineering & Technology, Hyderabad.
9. Convener - workshop, during 30th October to 5th November 2014 on “PCB Design and Fabrication” at CMR College of Engineering & Technology.
10. Convener - Faculty Development programme, during 18th to 24thDecember, 2014 on “Analog VLSI Design using Cadence Tools” ECE at CMR College of Engineering & Technology, Hyderabad.
11. Convener – 4th, 5th& 6th International conferences organized at GNITC Hyderabad during the years 2015, 2016 & 2017
12. Convener – 4th, 5th& 6th International conferences organized at GNITC Hyderabad during the years 2015, 2016 & 2017.
Publications Journals:

1. “Signal coding approach for GPS aided Geo augmented Navigation (GAGAN) system for aircraft Navigation”, Volume 4, Number 1, January-June 2012 (ISSN 2231-1254), International Journal of Wireless communication and Simulation.
2.“GAGAN signal estimation for Progressive signaling in satellite application – Extended filtration approach”, Volume 3, Number 2, July-December 2012, pp. 39-43, ISSN: 2229-7340 International Science Press, International Journal of Electronics, Computing and Engineering Education.
3.“GAGAN Signal Estimation over a variable data rate”, Volume-1, Number 02,March 2013, ISSN2277-6699,pp 37-40, International Journal on Computing, Communications and Systems.
4. “ Design and implementation of Electronic Voting System using finger print And Zig bee” M A Khadar Baba., M.Krishna Chaitanya; Vol-II, Issue -1, IPHV2I10004X, International Journal of Advanced Research and Innovation, ISSN: 2319-9245.
5. “Secured Wireless Communication for Industrial Automation and Control.” M A. Khadar Baba., M.Karthik; Vol-II, Issue -1,IPHV2I10002X, International journal of Advanced Research and Innovation, ISSN: 2319-9245.
6. “Micro controller based cryptosystem with key generation unit”. M A .Khadar Baba., M.Vedachary, Ch Gopi; Published in IOSR Journal of Electrical and Electronics Engineering (IOSR-JEEE) ISSN: 2278- 1676 Volume 4, Issue 2 (Jan -Feb. 2013), PP 20-27.
7. “Modified LMS Approach to signal Estimation in GPS Aided Geo Augmented Navigation”, Published in International Journal of Advances in Computer, Electrical & Electronics Engineering, Vol.3, Issue 2. ISSN: 2248-9584.
8.“ Subthreshold Dual Mode Logic” M A Khadar Baba., J Nageswar Reddy and T.Satyanarayana; Vol-3, Issue -2, June 2014, pp 141- 148, Builetin of Electrical Engineering and Informatics, ISSN: 2089-3191.
9. “Estimation of Global Positioning System Measurement Errors For GAGAN Applications”. Published in IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-ISSN: 2278-2834, p- ISSN: 2278-8735.Volume 9, Issue 6, Ver. III (Nov - Dec. 2014), PP 66-79.
10. “Design and Implementation of Embedded Web server Based on Arm and Linux”. Published in International Journal of Advances in Computer,Electrical & Electronics Engineering, Vol.3, Issue 2. ISSN: 2248- 9584.


Conferences
International/National:

1.M.A Khader Baba, V.Malleswara Rao, B. Prabhakara Rao, “Estimation of White Blood Cells Using Microwaves”, International Conference on Bio-Medical Electronics and Telecommunications organized by Dept. of ECE &Centre College of Engineering, Andhra University, Visakhapatnam December 2004.
2. Presented paper on “Significance of Signal to noise ratio in the context of GAGAN applications”, at 1st International conference on Emerging trends in Signal Processing &VLSI Design organized by ECE Department, Guru Nanak Engineering College, Hyderabad, during 11th to 13th June 2010.
3. Presented paper on “USB transceiver macro cell interference implementation on FPGA”, at 1st International conference on Emerging trends in Signal Processing &VLSI Design organized by ECE Department, Guru Nanak Engineering College, Hyderabad, during 11th to 13th June 2010.
4. Presented paper on “Performance of measure of Uni-biometric – Iris recognition system based on FAR, FRR, FTC, FTE and HTER ”, at 1st International conference on Emerging trends in Signal Processing &VLSI Design organized by ECE Department, Guru Nanak Engineering College, Hyderabad, during 11th to 13th June 2010.
5. Presented a paper on GAGAN Signal Estimation over a variable data rate –International conference on Computing, Communications, Systems and Aeronautics (ICCCSA -2012) Dept. Of ECE, Malla Reddy College of Engineering &Technology, Hyderabad on 30th - 31st March 2012.
6.Presented a paper on BER estimation for variable SNR in GAGAN application – at National Conference on “Computing Communication & Instrumentation (NCCCI- 12) during 21& 22 Dec-2012,GITAM University, Hyderabad.
7. Presented a paper on “IR Remote Controlled Water Robot using ARM -7” – at International conference on Industrial Scientific Research Engineering (IISRC), Conference No.3, September 2013, pages 165 -168.
8. Presented paper on “Performance Analysis of Turbo- SPC Codes in Wireless Communication” at National conference on Recent Trends in Electronics And Communications” conducted by Department of Electronics & Communication Engineering, G. Pulla Reddy College of Engineering , Kurnool on 25th January 2007.
9. Presented paper on “Adaptive array signal processing for GPS interference rejection” at 41st Mid –term symposium on Tracking the Telecom and IT revolution to rural India – Bridging the Digital divide, organized by IETE center, S V. University, Tirupati, during 9th - 10th April 2010.
10. Presented paper on “Trust Computing Enviroment Model in Cloud Architecture” at National Conference on Emerging Technologies and Tools in Mobile Phone Applications, during 21st& 22nd October 2011, conducted by Department of CSE at Annamacharya Institute of Science & Technology, Hyderabad.
11. Presented paper on “Generations from Mini-Clouds to Clouding Computing” at National Conference on Emerging Technologies and Tools in Mobile Phone Applications, during 21st& 22nd October 2011, conducted by Department of CSE at Annamacharya Institute of Science & Technology, Hyderabad.
12. Presented paper on Effective Estimation of Signal in GAGAN system – National Conference on Advances in Communication Technologies (NCACT-12) GIT, GITAM University.
13. Presented paper on Acquisition and Tracking of GPS signal - National Conference on Advances in Communication Technologies (NCACT-12) GIT, GITAM University.
14. Presented a paper on GAGAN Signal Estimation over a Highly Variant channel –Advances in Communication, Navigation and Computer Networks (ACNCN -2012) Dept. of ECE Andhra University 17th to 18th March 2012.
15. Presented a paper on BER estimation for variable SNR in GAGAN application –at National Conference on “Computing Communication & Instrumentation (NCCCI- 12) during 21& 22 Dec-2012,GITAM University, Hyderabad.


I) Life member, ISTE (Member of Indian Society for technical Education)

Dr. P. Subbaiah,Professor
1- P Subbaiah
QualificationB.Tech (ECE) , M.Tech (DSCE), Ph.D
Email IdSubbaiah.nani45@gmail.com
Experience22years
Previous working Experience2015- Sep, 2016 Worked as Principal at Siddartha Engineering college,Chittor.
2012- 2015 Worked as Principal at Bharath Womens Engineering college, Kadapa.
2009-2012 Worked as Principal at Acharya college of Engineering college, Kadapa
2007-2009 Worked as Professor at Narayana Engineering college, Nellore.
2005-2007 Worked as a Professor in the department of E.C.E at Rao&Naidu Engineering
College, Ongole.
2001-2005 Worked as an Associate Professor in the department of E.C.E at Annamacharya institute of Science & Technology, Kadapa.
2000-2001 worked as lecturer at Madina Engineering college, Kadapa.
1995-2000 Worked as a Senior Lecturer in T.M.Polytechnic, Kadapa.
Education Information•Ph. D – DFTS from S.K. University, Ananthapur-2007.
•M.Tech – DSCE from JNTUH, Hyderabad-2001.
•B.Tech - ECE from G.Pulla Reddy Engg College Kurnool 1992.
Area of SpecializationDigital Systems and Computer Electronics.
Subjects HandledCellular and Mobile Communication
Radar Systems
Data Communication
Digital Communication
Analog Communication
Linear Integrated Circuits And Applications
Television Engineering
Computer Networks
Optical Communication
Papers Published•Dr. P.Subbaiah et all., 2010, Secured Preemptive DSR(S-PDSR): An Integration of SRP and SMT with Preemptive DSR for Secured Route Discovery International Journal of Ad hoc, Sensor & Ubiquitous Computing (IJASUC) ,Vol.1, No.3, 2010
•Dr. P.Subbaiah et all. 2010 , Performance Comparison and Analysis of Preemptive-DSR and TORA International Journal of Ad hoc, Sensor & Ubiquitous Computing (IJASUC) Vol.1, No.4
•Dr. P.Subbaiah et al 2010,A Novel Optimization of Route Discovery in Dynamic Source Routing (DSR) Protocol for MANET, Global Journal of Computer Science and Technology, 6 Vol. 10 Issue 2 (Ver 1.0)
•Dr. P.Subbaiah et al., 2010,Achieving Network Layer Connectivity in Mobile Ad Hoc Networks, Global Journal of Computer Science and Technology Vol. 10 Issue 4 Ver. 1.0 June
•Dr. P.Subbaiah et al.,Performance Comparison of Congestion Aware Multi-Path Routing (with Load Balancing) and Ordinary DSR,IEEE transactions
•Dr. P.Subbaiah et al., 2010, Performance Evaluation of Adaptive Rate Control (ARC) for Burst Traffic over ATM Network, International Journal of Advanced Networking and Applications, Volume: 01, Issue: 04, Pages: 224-229
•Dr. P.Subbaiah et al., 2010Performance Comparison and Analysis of DSDV and AODV for MANET, (IJCSE) International Journal on Computer Science and Engineering Vol. 02, No. 02, 183-188
•Dr. P.Subbaiah et al.,2013 energy management scheme with load balancing for Preemptive Dynamic source routing protocol for MANET, Journal of Theoretical and Applied Information Technology. Vol. 51 No.3
•Dr. P.Subbaiah et al.,2011”Novel Approach for Cache Management for Reactive Routing Protocols in Mobile Ad-hoc Networks”,National Journal of Computer Science & Technology Volume 2 | Issue 1 |
•Dr. P.Subbaiah et al.,2010, “ Modified DSR (Preemptive) to reduce link breakage and routing overhead for MANET using Proactive Route Maintenance (PRM)”, Global Journal of Computer Science and Technology Vol. 9 Issue 5 (Ver 2.0)
•Dr. P.Subbaiah et al.,2013, “Mobility scenario-based Performance Evaluation of Preemptive DSRProtocol for MANET”, WSEAS transactions on communications Issue 5, Volume 12
•Dr. P.Subbaiah et al.,2009 “Secured Preemptive DSR – an integration of SRP and SMT with Preemptive DSR for secured route discovery”,International Journal on Information Sciences & Computing – volume-3, issue 1
•Dr. P.Subbaiah et al., 2010 “Modified DSR to reduce link breakage and routing overhead per MANET per preemptive route maintenance”, Global Journal of Computer Sciences and Technology – Volume-9, issue 5
•Dr. P.Subbaiah et al.,Surface Roughness Prediction with Denoising Using Wavelet Filter. International Journal of Advances in Engineering & Technology (IJAET) May Issue Volume-3, Issue-2.
•Dr. P.Subbaiah et al., 2012,”energy efficient preemptive dynamic source routing protocol for MANET”. IJCET,volume -3, issue-1, January-June
•Dr. P.Subbaiah et al., 2012, “mobility scenario-based performance evoluation of preemptive dsr protocol for manet. JCET, volume -3, issue-1
•Dr. P.Subbaiah et al., 2012, “comparative study for quadruple tank process with co-efficient diagram method”, .IIJECS, volume-1, issue-2
•Dr. P.Subbaiah et al., 2012,FLC based Speed control of SR Motor with Neural network based rotor angle estimation”,International Journal Of Ciit
•Dr. P.Subbaiah et al., 2012,”Decoupled Control Strategies’ for Quadruple Tank process” ,International Journal Of Ciit
•Dr. P.Subbaiah et al., 2014, “Tuning and Analysis of Multiple Interactive Loop Process by Model Predictive Control”, International journal of engineering technology
•Dr. P.Subbaiah et al., 2014, “Tuning of Nonlinear Model Predictive Control for Quadruple Tank Process “, Journal of Theoretical and Applied Information Technology. Vol. 51 No.3
•Dr. P.Subbaiah et al., 2013, “Centralized and Decentralized of Quadruple Tank Process”, International journal of computer applications IJCA
•Dr. P.Subbaiah et al., 2013, “Linear and Nonlinear Model Predictive Control of Quadruple Tank Process’’International journal of computer applications IJCA
•Dr. P.Subbaiah et al., 2013, “Integrated Noise Removal Filter for Switched Reluctance Motor (SRM)” , International Journal of Computer Applications (0975 – 8887) Volume 65– No.14,
•Dr. P.Subbaiah et al., 2014, “ High Speed Charging and Discharging Current Controller Circuit to Reduce Back emf by Neuro Fuzzy Logic”, International Journal of Applied Engineering Research ISSN 0973-4562 Volume 9, Number 22 (2014) pp. 12949-12960
•Dr. P.Subbaiahet al.,“2014 Rotor Position Of Switched Reluctance Motor Using Sensorless Method”, Journal of Theoretical and Applied Information Technology 2014. Vol. 70 No. 6
•Dr. P.Subbaiah et al.,“2014 “Design Implementation and Hardware Structure for Image Enhancement and Surface Roughness with Feature Extraction Using Discrete Wavelet Transform” in Journal of Computer Science, Science Publication, Doi: 10.3844/Jcssp.2014.347.352
•Dr. P.Subbaiah et al.,2014 ,“Neural Model For Image Enhancement Using Discrete Wavelet Transform” International Journal of Electrical, Electronics and Data Communication,ISSN (PRINT): 2320-2084, Volume – 1, Issue – 2, 2013,PP 16-21
•Dr. P.Subbaiah et al.,2013, Indian Journal of Applied Research “Non Linear Image Processing with Evolvable Hardware Filter”, volume-3, issue-8, pp 58-61.ISSN 2249-555X.
•Dr. P.Subbaiah et al., 2015, International Journal of Applied Engineering Research “Forked Embedded System Models for Automotive Airbag Control System” ,ISSN 0973-4562 Volume 10, Number 12 ,pp. 31845-31854 © Research India Publications
•Dr. P.Subbaiah et al., 2015, International Journal of Applied Engineering Research “Performance Analysis of Screening Liver Tumors Using Image Fusion and Neural Network Classifier”, ISSN 0973-4562 Volume 10, Number 4 pp. 10525-10537 © Research India Publications
•Dr. P.Subbaiah et al., 2015 ARPN Journal of Engineering and Applied Sciences,“A Survey on Liver Tumor Detection And Segmentation Methods” Vol. 10, NO. 6, ISSN 1819-6608
Conferences / Seminars attended•IEEE Conference, Beijing, China, attended the conference for paper”The Study of Fault Tolerant System Design Using Complete Evolution Hardware”presentation during the Period July 25th - 29th, 2005.
•“Application of Neural Network For Estimation of Surface Roughness Using Discrete Wavelet Transform” 2013 International Conference on Education & Educational Research (EER 2013) held on August 11-12,2013,Pp443-449,Singapore.
•“Image Enhancement and Surface Roughness with Feature Extraction using DWT.”International conference SEISCON-2011 (IET).
•“Preemptive Dynamic Source Routing protocol mobile Adhoc N/W with Back up root.”
•National Conference on National Research Scholar’s Seminar on Green Technologies in Communication & Computing,with ISSN.No 2320-8007,sponsored by Board of Research in Nuclear Science (BRNS), “Estimation of Surface Roughness with feature Extraction using Evaloble Hardware filter” organized during 3rd and 4th October 2013 at St.Peter’s University,Chennai,pp 1153-1158.
•National Conference on New Avenues in Sensors & Automation (NASA-12) “Machine Vision Based On Image Enhancement Using Evolutionary Design In Noise Filter” Presented At Sathyabama University, Chennai ,on 15th& 16th March 2012,pp 57-64.
•Second National Conference on Communication, Computation, Control & Automation“Feature Extraction Of Image For Surface Classification Using Discrete Wavelet Transform & Dual Tree Complex Wavelet Transform” Presented At Sri Ramakrishna Institute Of Technology Coimbatore, on 23rd& 24th April 2010.
•“An Adaptive Low Overhead Routing Scheme with Priority Function for MANETS” in ICACT-2013 at AITS, INDIA pp 6-13, 2013. ISBN 978-1-4673-2816
•Secured preemptive DSR An interpretation of SRP and SMT with primitive DSR for secured root discovery.” CBI conference Honolulu, USA titled Design of Fault Tolerance System UsingEvolvable Hardware, March 2006
•“Energy Efficient with Throughput Maximization Routing in MANET” in FTCC-2013 at
•Bangkok Thailand,pp148-151 2013.
•ECT Conference Spain titled Design of the Fault Tolerance System Using ExtrinsicEvolvable Hardware, october2006.
•“Preemptive Dynamic Source Routing protocol for Wireless Adhoc Network”, International Conference at VRSCE, Vijayawada.
•“Load balancing energy management scheme for preemptive DSR to increase pocket delivery ratio and decrease delay”, IEEE National conference at AVIT, Tamilnadu.
•“Energy Efficient Routing In Mobile Adhoc Networks Using Aggregate Interface Queue Length And Node Remaining Energy” in RTETMSD-2013 at MVN UNIVERSITYvolume-6 issue-6 pp 1-6, 2013,ISBN 0974-3154.
•“Low Overhead Routing Protocol For Mobile Adhoc Networks” in NRSS-GCC 2013 at St.PETER’S UNIVERSITY,volume-11 pp 1060-1063,ISBN 2320-8007.
•“Security Issues pertaining to MANET”, at SVU, Tirupathi.
•“Data Management in MANET”, National conference at VCET, Erode, TN.
CO CURRICULAR ACTIVITIES:•Acted as a Judge international conference IET held at Dr MGR University, Chennai 2007.
•Attended and Conducted International Conference on Emerging Technologies Computer Science Engineering at VRSEC, Vijaywada.2009
•Acted as a Judge,National level technical symposium on 10th march at Siddharth group of engineering colleges.2012
•Acted as a Judge, National level technical symposium on 22nd March E-tech at Madina engg college, Kadapa.2014
•BOS member for JNTU Anantapur from 2009 ECE Department
•NAAC “ A” Grade for Siddartha insuite of science and technology as a Principal 2016.

Mr P.S. Sreenivas Reddy, Associate Professor
Mr P.S. Sreenivas Reddy, Associate Professor
QualificationB.E(ECE), M.E(Applied Electronics), ( Ph D)
Email Idsrinivasareddy.ps@nnrg.edu.in
Experience16 Years
Professional Memberships: i) MISTE
ii) MIETE
Administrative Assignments:•Associate Professor of ECE Dept, NNRG since June 2011.
•Head of ECE Department, SDEC - Hyderabad from July 2009to May 2011.
•Assistant Professor of ECE Dr. MGR Educational & Research Institute (Dr. MGR University), Chennai from Jan 2001 to May 2009.
Education Information:•Pursuing Doctor of philosophy (Ph.D) in Jadavpur University Kolkata
•M.E. (Applied Electronics ) from Madras University, Chennai
•B.E (ECE) from Madras University, Chennai
Courses / Workshops Attended:•Workshop on “Multi disciplinary Applications Using LabView” at NNRESGI, Hyderabad on 20th to 25th March,2017.
•Workshop on “Faculty Enablement Programme” by TASK& Infosys, Hyderabad from 27th to 29th Sep,2016.
•Workshop on “Microcontrollers –Programming & Applications” at Advanced Training Institute for Electronics and process instrumentation from 23th to 27th Nov,2015.
•Workshop on “Advances in Image Processing and Applications” at BITS, Pilani, Hyderabad Campus from 26th to 27th oct,2013.
•Workshop on “Leadership Training” at Venkat‘s Institute of skills training, Hyderabad from 13th july to 19th Aug-2010.
•Workshop on “SMARTGRIDS AND DISTRUBUTION NETWORKS” at Dr M.G.R University, Chennai from 29th to 30th dec, 2009.
•Workshop on “Refresher course on VLSI design” at UGC-Academic staff college JNTU, Hyderabad from Nov 13th to Dec 03rd, 2002.
•Workshop on “Embedded systems” at SASTRA University, Thanjavur from 12th to 14th Sep, 2002.
•Workshop on “Teaching Competency” at Technical Teacher Training Institute, Chennai from 23rd and 24th Feb, 2002.
Conferences/ Workshops/ Refresher courses conducted:1.Convener – workshop on “Multidisciplinary application uses LABVIEW” during 20th to 25th March, 2017 at Nalla Narasimha Reddy group of Institutions, Hyderabad.
2.Convener – workshop on “Analog & Digital System using Cadence EDA Tool” during 3rd to 5th Feb, 2016 at Nalla Narasimha Reddy group of Institutions, Hyderabad.
3.Convener – workshop on “Simulation Using Proteus & Keil µ Vision” during 17th and 18th April, 2015 at Nalla Narasimha Reddy group of Institutions, Hyderabad.
4.Convener – workshop on “PCB Design & Fabrication” during 25th and 26th July,2014 at Nalla Narasimha Reddy group of Institutions, Hyderabad.
Conferences International/National:•P. S. Sreenivasa Reddy, “Design and Development of ARM7 Based Real-Time Industry Automation System using Sensors & GSM” AUSTIN, Vol3, Issue1, pp.01-04, June-2017.
•P. S. Sreenivasa Reddy, “Synthesis of high K films using Zr doped TiO2 by Sol-gel method suitable for ultra thin MOS devices” at International Journal of Applied Engineering Research in the month of December, 2015.
•P.S.Sreenivasa Reddy, “Intelligent Approach for Power System PMU Placement” at IEEE POWERCON 2008, India in the month of Octember, 2015
• P.S.Sreenivasa Reddy, “Power System PMU Placement a Comparitive Survey Report”, IET Conference ICTES 2007, Dec 20-22, Chennai.
•P.S.Sreenivasa Reddy, “VLSI Design and implementation of INTEL 8253 IC using VHDL”, IET Conference ICTES 2007, Dec 20-22, Chennai.
Ms.Indira Priyadarshini Gera, Associate Professor
2-G Indira Priyadarshini
QualificationM.Tech
E-mail Idindirapal2020@gmail.com
Teaching Experience 10 Years
Previous working Experience:

I) Working As A Associate Professor Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since June 2012 To Till Date.

II) Worked As An Asst.Prof At Malla Reddy College Of Engineering, Kompally From July 2008 To May 2012.

Education InfromationI) M.Tech Systems and Signal Processing pass out from JNTUH Kukatpally in 2011

II) B.Tech ECE Bhoj Reddy Engineering College for Women,Saidabad,Hyderabad in 2004
Area of SpecializationI) Systems and Signal Processing

II) Data communication
Subjects handled I) Antennas &Wave Propagation.

II) Telecommunication Switching Systems & Networks.

III) Radar Systems.

IV) Digital signal processing.

V) Digital Logic Design.

VI) Microprocessors and microcontrollers.

VII) Electronic Measurements and Instrumentation.

VIII) Optical communications

IX) Advance Data Communications for M.TECH

X) Digital signal processors & Architectures for B.Tech & M.Tech

XI) Computer Organization.

XII) Switching Theory And Logic Design.

XIII) Embedded Systems.
Papers PublishedAn Intelligent Suspicious Activity Detection Framework (ISADF) for Video Surveillance Systems, International Journal of Computer Applications, December 2013.
Conferences / Seminars attendedI) Happiness @ work and Transformation Training, MREC, March 2012.

II) Women in engineering and Research opportunity, 13th & 14th August 2011, MREC, JNTUH.
Projects Guided22 U.G Projects Guided
Memberships:IEEE
Any Industry Experience1 Year Kavailli Electronics, Cherlapally,hyderabad
Mr.Devendar Reddy Y, Associate Professor
3-Y Devender reddy
QualificationM.Tech
E-mail Iddevender_reddy03@rediffmail.com
Teaching Experience 9
Previous working Experience:

I) Working As A Associate Professor Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since June 2012 To Till Date.

II) Worked As An Asst.Prof At Malla Reddy Institute Of Engineering & Technology, Kompally From June 2008 To May 2012.

IV) Worked As An Asst.Prof At Raja Mahendra College Of Engineering, Ibrahimpatnam From June 2005 To May 2008.

Education InfromationI) M.Tech Digital Systems & Computer Electronics pass out from Malla Reddy Engineering College, Kompally, Hyderabad in 2012

II) B.Tech ECE pass out from HRD Engineering College, Devarakonda in 2005
Area of SpecializationDigital Systems and Computer Electronics
Subjects handled I) Electronic Devices & Circuits

II) Signals & Systems

III) Switching theory and logic design

IV) Digital signal processing

V) Electronic circuit analysis

VI Electric circuits

VII) Digital Logic Design

VIII) Network Theory

IX) Transducers in Instrumentation.

X) Digital signal processors & Architectures

XI) CPLD & FPGA Architectures
Papers Published
Y.Devendar Reddy, Design of Secure Underground Coal Mines Using Innovative Wireless Sensor Network, International journal of IJOEET, August 2015.
Conferences / Seminars attended

I) Participated in a two day workshop on “PCB Design and Fabrication”, 6th-7th Sep -2013 held in Nalla Narasimha Reddy College Educational Society’s Group of Institutions, Korremula, JNTUH.

II) Participated in workshop on Introduction to Basic Simulation, August 2009, CMR Engineering College, Medchal, JNTUH.

Projects GuidedI) 18 U.G Projects Guided

II) 03 P.G Projects Guided
Memberships:
Life Time Member, IETE (Member of Institute of Electronics & telecommunication
engineering).
Mrs.BHAKTULA SUNEETHA,Associate Professor
 4-B Suneetha
QualificationB.Tech (ECE) , M.Tech (SSP)
Email Idsunithae@rediffmail.com
Teaching Experience (in Years)14 years
Previous working ExperienceWorked as Associate Professor in ECE Dept at VARDHAMAN COLLEGE OF ENGINEERING, Shamshabad from 5th MAY 2014 to NOV 30 2015.

Worked as Associate Professor in K.N.R.C.E.R COLLGE OF ENGINEERING, from 1st july 2013 to 30th April 2014.

Worked as Assistant Professor in ECE Dept at NISHITHA College of Engg.&Tech,, Lemoor, from Sep 1st 03 to till 30th june 2013.

Worked as Assistant Professor in S.V.P.CET, Puttur Since July 2001 to May 2002.

Worked as Technical Executive In STG, Tirupati since Nov 1999 to Jan 2001.
Education Information•M.Tech – SSP from JNTUH, Hyderabad-2011.
•B.Tech - ECE from G.Pulla Reddy Engg College Kurnool 1996.
Area of SpecializationSystems Signal Processing
Subjects HandledElectronic Devices And Circuits
Electronic Circuit Analysis
Linear Integrated Circuits And Applications
VLSI Design
Television Engineering
Papers Published•Serial front panel data port protocol implementation in Xilinx FPGAS published in IJRIT volume 2 issue 10 oct 2014 page 153-158. ISSN 2001-5569.

•Designing an efficient image encryption then compression system published in IJIREEICE volume 3 issue 3 march 2015 ISSN 2321-5521.
Memberships• IETE M237426

• IACSIT 80349543


Seminars & Workshops attendedAttended one Week Work Shop On Open Source Collaboration Organized By UGC at JNTU Hyderabad
Mr B.Chandrashaker Reddy, Assistant Professor
Mr BIJJULA CHANDRASHEKAR REDDY Asst
QualificationM.Tech
E-mail Idbijjulaiete@gmail.com
Teaching Experience 4 years
Previous working Experience:

I) Working as Assistant Professor of Ece Department in Nalla Narasimha Reddy Educational Society’s Group of Institutions since June 2012 to till date.

II) Lecturer at Mite, Gautami Degree College, Sr Nagar from June 2011 to March 2012.

Education InfromationI) M.Tech Digital Systems and Signal Processing pass out from GIT Vizag in 2011

II) AMIETE ET - Pass out from IETE New Delhi in 2007
Area of SpecializationDigital Image Processing, Speech Processing
Subjects handled Undergraduate (UG)

I) Signals And Systems

II) Digital Signal Processing

III) Digital Image Processing

IV) Analog Communications

V) Pulse And Digital Circuits

VI) Embedded Systems

VII) Controls Systems

Post Graduate (P.G)

I) CMOS Digital Integrated Circuits

II) Advanced Operating Systems

III) Embedded
Projects GuidedI) Under Graduate

Guided 14 projects (Major and Mini)

II) Post Graduate

Guided 2 projects
Memberships:IETE- AM146739 Associate Member of Institution of Electronics & Telecommunication Engineering
Any Industry Experience

I) Project Engineer in Sigma Microsystems Private Limited resided at Uppal, Hyderabad from June 2010 to April 2011.

II) Academic Project Associate in Robo Tech Solutions resided at Ameerpet, Hyderabad from September 2007 to March 2009.

Mr. Aare Gopal, Associate Professor
Mr AARE GOPAL Assoc Prof
QualificationM.Tech
E-mail Idaaregopal@gmail.com
Teaching Experience 9.3 years
Previous working Experience: I) Working as Assoc.Prof of ECE in Nalla Narasimha Reddy College Educational Society’s Group of Institutions since June2014 to till date.

II) Assoc.Prof at TITS, Hyderabad from June 2013 to May 2014.

IIII) Assoc.Prof at PRIT, Wargal from Dec 2010 to June 2013.

IV) Asst.Prof at KSIT, Moinabad from Feb 2010 to Dec 2010.

V) Asst.Prof at SHCST, Pregnapur from July 2007 to Jan 2010.

VI) Asst.Prof at MCET, Kondapak from June 2006 to July 2007.
Education InfromationI) M.Tech-pass out from JNTUH College of Engineering (SSP) in 2011

II) 2. B.Tech- Pass out from Vijay Rural Engineering Nizamabad in 2003
Area of SpecializationSystems And Signal Processing
Subjects handled I) Electromagnetic Waves and Transmission Lines.

II) Antennas and Wave Propagation

III) Microwave Engineering

IV) Electronic Devices and Circuits

V) Electronic Circuit Analysis

VI) Pulse and Digital Circuits

VII) Linear and Digital Integrated Circuits

VIII) Digital Signal Processing

IX) Digital Image Processing
Conferences / Seminars attended

I) Participated A three day intensive course on EMTL, which was organized by JNTUH Jagtial, karimnagar and held from 2nd to 4th March 2015.

II) MHRD Funded and jointly organized by IIT Kharagpur & IIT Bombay, A Two week ISTE workshop on “Signals and Systems” in TITS, Hyderabad this was held from 2nd to 12th Jan 2014.

III) AICTE Sponsored three days National Level Workshop on “FPGA Based Embedded System Design” in TITS, Hyderabad this was held from 5th to 7th December 2013.

IV) A 5 day workshop on ‘High Impact Teaching Skills’ in MLRIT, Hyderabad this was held from 27th to 31st December 2011.

Projects Guided18
Dr. CH. Venkata Sivaprasad, Assistant Professor
 Dr. CH. Venkata Sivaprasad, Assistant Professor ece
QualificationB.E(ETCE), M.E(VLSI DESIGN), Ph D
Email Iddrsivach@gmail.com
Previous working Experience3 Years
Education Information•Ph D (ECE) from Dr. MGR University, Chennai.
•M.E. (VLSI DESIGN) from SATYABAMA University, Chennai.
•B.E (ETCE) from SATYABAMA University, Chennai.
Memberships in Professional Bodies:Member of IEEE-India
MISTE- Indian Society for Technical Education, New Delhi
Funded Projects:Funded by MSME Government of INDIA (INR-7,50,000/-) on SMART – SAFE AND DISABLE FRIENDLY ENERGY SAVING BUILDINGS (A low cost model for future homes) with Incubation Center in Dr.M.G.R. University, Chennai.
BOOKs and NEWs Letters Published:1.Venkata Siva Prasad.CH, Published Book of “ENJOYMENT OF PRACTICAL ELECTRONICS (A Lerner for Electronics experiments)” through Dr.M.G.R.University with ISBN-978-938465414-6.
2.Venkata Siva Prasad.CH Released News Letter on “Multi-Core Systems for Future and it’s Advancements in Real-Time Applications”.
Areas of Specialization:•VLSI Design
• Embedded Multi-core Systems
•Wireless Sensors Networks and IoT
• Computer Architectures
• Quantum Computing
• Satellite Communication
Conferences/ Journals attended &published:International journal Publications:
1.Venkata Siva Prasad. CH, 2015, ‘Multi-Core Processor Based TCP/IP Client and Server Module Using OpenMP’, International Journal of Applied Engineering Research, vol. 10, no. 7, pp. 18489-18502. (H Index -13).
2.Venkata Siva Prasad. CH, 2015, ‘Performance Improvement in Data Searching and Sorting Using Multi-Core’, ARPN Journal of Engineering and Applied Sciences, vol. 10, no. 16, pp. 7024-7032. (H Index -15)
3.Venkata Siva Prasad.CH, 2016, ‘Design and Implementation of Scheduler for Virtual File Systems in Shared memory Multi-Core processor Using ARM-FL2440’, International Journal of Control Theory and Applications, vol. 9, no. 10,pp. 4747-4754. (H Index -9)
4.Venkata Siva Prasad. CH 2016, ‘Scheduler for shared memory among multiple cores with performance in dynamic allocator using ARM processor’, ARPN Journal of Engineering and Applied Sciences, vol. 11, no. 9, pp. 5784-5791. (H Index -15)
5.Venkata Siva Prasad. CH 2016, ‘Implementation of Montgomery Modular Multiplication Algorithm for Multi-Core Systems’, International Journal of Control Theory and Applications, vol. 9, no. 4, pp. 147-157.(H Index -9)
6.Venkata Siva Prasad. CH 2016, ‘Multi-Core processor for Montgomery Modular Multiplication of Carry Save Adder, Published in IEEE Digital Explore, pp. 4952-4957

International Conference Proceedings:
1.Venkata siva prasad.Ch., 2016, “Performance of Shared Virtual Memory for Multi-Core Processor Using Gizmo Board” Acceppted in international conference and for publication in Springer Advances in Intelligent Systems and Computing Series, ISSN 2194-5357.
2.Venkata siva prasad.Ch.,2016, “Design and Implementation of Scheduler for Virtual File Systems in Shared memory Multi-Core processor Using ARM-FL2440 ” The 3rd International Conference on Digital Policy & Management , Nikko Saigon, Hochiminh, Vietnam. ISSN 2288-5791.
3.Venkata siva prasad.Ch., 2016, “Performance of Shared Virtual Memory in Multi-core Processor Using Scheduler” , International Conference on Recent Advance in Applied Science – 2016, organized by ISPA and St.PETER’S UNIVERSITY ,Chennai, Tamil nadu, on 11-13 February 2016.
4.Venkata siva prasad.Ch.,2016, “Multi-Core processor for Montgomery Modular Multiplication of Carry Save Adder” , International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT) – 2016, organized by DMI college of engineering, Chennai, Tamil nadu, on 3-5th march 2016.
Seminars/ Workshop/Staff Development Programs Attended 1.Acted as IEEE sponsored Session chair in “International Conference on Energy, Communication, Data Analytics and Soft Computing (ICECDS)., organized by IEEE Madras section, Chennai, Tamil nadu. ISBN: XPLORE COMPLIANT - 978-1-5386-1887-5.
2.Participated in Four Days FDP on “VLSI TESTING” Organized by QMAX TEST TECHNOLOGIES, Dr.M.G.R.University, Chennai.
3.Participated in Seven Days FDP on “VLSI DESIGN” Organized by UGC- ANNA UNIVERSITY, Chennai.
4.Participated Two Days Workshop on “MEMS and its Simulation (Comsol Tool)”at Dr .M.G.R Education and Research Institute University, Chennai,T.N.
5.Participated in Four Days Workshop on “Internet Of Thing(IoT)” Organized by Department of ECE, INTEL-FICE, Dr.M.G.R.University, Chennai.
6.Participated in ONE Day Workshop on “Wireless Sensor Networks and Its Use In IoT” Organized by Department of ECE ,ANNA University, Chennai.
7.Participated in ONE Day International Technical Seminar on “The State of the Art Of Neurodynamic Optimization ”organized by IEEE Computational Intelligence Society.
8.Participated in ONE Day Workshop on “Scientific Writing Made Easy Thesis” Organized by Department Of R & D ,Dr.M.G.R.University, Chennai.
Ms. Gurram Umadevi, Assistant Professor
Mrs. GURRAM UMA DEVI. Asst
QualificationM.Tech
E-mail Idumadevimailsyou@gmail.com
Teaching Experience 7.5 Years
Previous working Experience:
3.5 years
I) Working as Assistant Prof. of ECE in “Nalla Narasimha Reddy College Educational Society’s Group of Institutions” since June 2014 till date.II) Worked as an Asst.Prof in “Gurunanak Engineering college”, JNTUH for 1.6 year from June 2008 to November 2009.

III) Worked as an Asst.Prof in “Nagarjuna Institute of Technology and Science”, JNTUH for 2 years from June 2006 to May 2008.

Education InfromationI) M.Tech DECS pass out from Gurunanak Engineering college Ibrahimpatnam, (JNTUH)

II) B.Tech ECE SRTIST Nalgonda, JNTUH
Area of SpecializationI) Digital Electronics

II) Communication System
Subjects handled I) Electronic Devices and Circuits

II) Pulse and digital circuits

III) Switching theory and logic design

IV) Integrated circuit applications

V) Electronic measurements and instrumentation

VI) Microprocessors and microcontrollers

VII) Optical communications

VIII) Digital system design for M.TECH
Mr. Madhu Shiramshetty, Assistant Professor
Mr SRIRAM SHETTY MADHU Asst Prof
QualificationM.Tech
E-mail Idmadhuesforu@gmail.com
Teaching Experience 3 Years 6months
Previous working Experience:
Working As Assistant Professor Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since July 2012 Till Date.
Education InfromationI) M.Tech Embedded Systems Pass out from CVSR Engg College, Venkatapur, Ghatkesar in 2012

II) B.Tech ECE pass out from Madeira Institute Of Technology and Sciences, Kodad in 2008
Area of SpecializationEmbedded Real time Operating Systems
Subjects handled I) Switching Theory and Logic Design

II) Embedded Systems

III) Digital Logic Design

IV) Micro Processor and Micro Controller
Projects GuidedI) For B.Tect 6 Projects

II) For M.Tech 2 Projects
Any Industry ExperienceEmbedded Software Labs, One year, Ammerpet 2011-2012
Ms. Sneha Talari, Assistant Professor
Mrs. SNEHA TALARI. Asst
QualificationM.Tech
E-mail Idhanni.ts88@gmail.com
Teaching Experience 3.4years
Previous working Experience: I) Working as Assistant. Professor of ECE in Nalla Narasimha Reddy College Educational Society’s Group Of Institutions since June-2013 till date.

II) Assistant. Professor at Gurunank Engineering college, Ibrahimpatnam from June-2012 to May-2013
Education InfromationI) M.Tech (Microwave and Radar Enginnering) pass out from Osmania University Hyderabad in 2011

II) B.Tech ECE Pass out from Karshak Engineering College, Uppal in 2009
Area of SpecializationMicrowave and Radar Engineering
Subjects handled I) Microwave Engineering.

II) Radar Engineering.

III) Antenna and Wave Propagation.

IV) Electromagnetic Wave Theory and Transmission Lines.

V) Analog Communications.
Papers Published
Published a paper “ Tappered Spiral Helix Antenna” in International Journal of Emerging Technology and Advanced Engineering with ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 3, March 2013
Conferences / Seminars attendedParticipated in a two day workshop on “PCB Design and Fabrication”, 6th-7th Sep -2013 held in Nalla Narasimha Reddy College Educational Society’s Group of Institutions, Korremula, JNTUH.
Projects GuidedI) Implementation of BPSK and QPSK modems in communication Systems.

II) Generation of PRI Stagger & Jitter Modulations on Radar Waveforms For Evaluation Of ESM Systems.

III) Implementation and Performance Analysis of N-Way Wilkinson Power Divider.
Memberships:Annual Member of IETE (Member of Institute of Electronics & telecommunication
engineering)-2014
Mr. Srinivasa Rao Seelam, Assistant Professor
5-S Srinivas Rao
QualificationM.Tech
E-mail Idsrinu03c@gmail.com
Teaching Experience 8 years
Previous working Experience:

I) Working as Assistant Professor of ECE in Nalla Narasimha Reddy College Educational Society’s Group Of Institutions since July 2013 till date.

II) Asst.Prof at Srinidhi Institute Of Science And Technology, Ghatkesar from June 2010 To June 2013

III) Asst.Prof at TKR Engineering College, Meerpet from July 2008 To June 2010

Education Infromation

I) M.Tech ECE pass out from Madhira Institute Of Science And Technology, Kodada, Nalgonda Dist. In 2007

II) B.Tech ECE pass out from Sai Spurthi Institute Of Science And Technology, Sathupally in 2007

Area of SpecializationI) Electronic Devices And Circuits

II) Electronic Circuit Analysis

III) Switching Theory And Logic Design

IV) Computer Organization

V) Linear Ic Applications

VI Analog Communication

VII) Digital Communication

VIII) Microprocessors & Microcontroller

IX) Microcontroller Applications

X) VLSI

XI) Embedded Systems
Subjects handled I) Electronic Devices And Circuits

II) Electronic Circuit Analysis

III) Switching Theory And Logic Design

IV) Computer Organization

V) Linear Ic Applications

VI Analog Communication

VII) Digital Communication

VIII) Microprocessors & Microcontroller

IX) Microcontroller Applications

X) VLSI

XI) Embedded Systems
Research ProjectsAdvanced Wireless Nodal Sensor Networks
Conferences / Seminars attended

I) Participated in workshop on Embedded Systems”, 03-09-2012 Srinidhi Institute Of Science And Technology ,Ghatkesar.

II) Participated in workshop on Advanced Wireless Communicationon 12-03-2010 TKR Engineering College, Meerpet.

Projects GuidedI) 30 B.Tech

II) 10 M.Tech
Mr. Kurumaiah N, Assistant Professor
Mr NAGANULA KURUMAIAH Asst
Designation
QualificationM.Tech
E-mail Idkurmi1016@gmail.com
Teaching Experience 3+ Years
Previous working Experience: I) Working As Asst. Prof. Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since 1st Jusly 2013 Till Date.

II) Working As A Trainer In Silicon Systems From 1st July 2012 To 30th June 2013
Education InfromationI) M.Tech VLSI System Design pass out from GokarajuRangaraju Institute Of Technology, Bachupally in 2011

II)B.Tech ECE Mahatma ghandi Institute Of Technology And Science, Gandipet in 2007
Area of SpecializationVLSI System Design
Subjects handled I) Electronics Devices and circuits

II) VLSI

III) Micro Processor And Micro Controller

IV Switching Theory and Logical Design
Conferences / Seminars attended

I) Participated in workshop on PCB DESIGN, ATTENDED in Nalla NarasimhaReddy Educational Society`s Group Of Institutions, Chowdaryguda, JNTUH.

II) Participated in workshop on LAB VIEW, ATTENDED in Nalla NarasimhaReddy Educational Society`s Group Of Institutions, Chowdaryguda, JNTUH.

Projects Guided5 Projects
Any Industry ExperienceWorking as a Trainer in Silicon Systems From 1 st July2012 to 30th June2013
Ms. Ch.P.N.S.Sujitha, Assistant Professor
6-CH P N S Sujitha
QualificationM.Tech
E-mail Idpavanichinta018@yahoo.com
Teaching Experience 3 years 4 months
Previous working Experience:

I) Working as an Assistant Professor of ECE In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions since June, 2014 till date.

II) Asst. professor at Global Institute Of Engineering & Technology, Hyderabad from December 2013 to MAY 2014.

III) Asst. professor in E.C.E Dept. at Bharat Institute Of Science And Technology For Women, Hyderabad from July 2010to December 2011.

Education InfromationI) M.Tech Embedded Systems & VLSI Design pass out from M V S R Engineering College, Nadergul in 2013

II) B.Tech ECE pass out from S R T I S T, Nalgonda in 2010
Area of SpecializationEmbedded Systems and VLSI Design
Subjects handled I) Switching Theory and Logic Design

II) Microprocessors and Microcontrollers

III) Embedded systems

IV) VLSI Design

V) Electronic Devices and Circuits

VI) Control Systems
Papers Published
Developing CMOS Camera & USB Device Drivers in LINUX 2.6.32” an international journal of IJECCT (Volume 3 Issue 4) in the month of July 2013.
Conferences / Seminars attended
Participated in an one day National Level Workshop on “ Image Processing and it’s Applications ” on 23 rd January, 2013 organized by ECE Dept, Global Institute of Engineering &Technology, Hyderabad.
Projects GuidedI) B.Tech – 5

II) M.Tech - 1
Any Industry ExperienceIntern at VYAS Informatics From Sep,2012 To July,2013, Hyderabad
Ms. Saraswathi S, Assistant Professor
Ms. SIRIKONDA SARASWATHI. ASST
QualificationM.Tech
E-mail Idsirikondasaraswathi@gmail.com
Teaching Experience 3 .4 years
Previous working Experience:

I) Working As Assistant Professor Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since 11th June 2014 Till Date.

II) Worked As Assistant Professor At Siddartha Institute Of Technology, Hyderabad From 15 July 2013 To 31 Oct 2013

II) Worked As Assistant Professor At Chilukur Balaji Institute Of Technology, Hyderabad From 21 July 2010 To 2nd Jan 2012.

Education InfromationI) M. Tech EMBEDDED SYSTEM pass out from CBTV, Hyderabad in 2013

II) B. Tech ECE pass out from BRECW, Hyderabad in 2008
Area of SpecializationEmbedded System
Subjects handled I) Microprocessors And Microcontroller

II) Electronic Measurements And Instrumentation

III) Electronic Devices And Circuits

IV) Satellite Communication
Papers PublishedS.Saraswathi “Vehicle speed monitoring and automatic toll collection system on highway” National journal in JCT Journals, Sep 2013.
Ms. Samarla Shilpa, Assistant Professor
7-S shilpa
QualificationM.Tech
E-mail Idshilpa.samarla@gmail.com
Teaching Experience 4.4 years
Previous working Experience:

I) Working As Assistant Professor Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since 03rd July 2014 Till Date.

II) Project Assistant/R&D At Cvr College Of Engineering, Ibrahimpatnam From 07 July 2007 To 10 October 2010.

Education InfromationI) M.Tech VLSI System Design pass out from Nalla Malla Reddy Engineering College, Narapally, Ghatkesar in 2007

II)B.Tech ECE pass out from CVR College of Engineering College, Ibrahimpatnam in 2007
Area of SpecializationVLSI System Design
Subjects handled I) Integrated Circuits

II) Electronic Circuits
Conferences / Seminars attended

I) Participated in workshop on “Signals and Signal Processing”, 28th to 30th June 2010, conducted by JNTUH.

II) Participated in workshop on “PSOC”, 22nd March 2010, CVR College of Engineering, Ibrahimpatnam, JNTUH.

Projects GuidedI) A novel for low power and high speed Wallace tree multiplier.

II) Distributed Arithmetic for FIR Filter Design on FPGA.

III) Implementation and comparison of effective area architectures for CSLA.
Ms. Vulpala Madhavi, Assistant Professor
Ms. VULPALA MADHAVI. Asst
Teaching Experience 10months
Subjects handled I) Electronic Device Circuit

II) Digital Electronics
Education InfromationI) M.Tech (Vlsi &Embedded Systems) pass out from Malla Reddy Institute Of Science And Technology, Maisammaguda in 2014

II) B.Tech (ECE) Pass out from Holy Mary Institute Of Science and Technology Bogaram in 2012
QualificationM.Tech
Area of SpecializationVLSI & Embedded Systems
E-mail Idvulpala.madhavi@gmail.com
Previous working Experience: Working As Asst.Professor Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since 10months From Dec 22nd Till Date.
Ms. Kothur Roopa, Assistant Professor
Photo
QualificationM.Tech
E-mail Idrupakothur@gmail.com
Teaching Experience 8 Years
Previous working Experience: Working As Asst.Professor Of Ece In Nalla Narasimha Reddy College Educational Society’s Group Of Institutions Since 30 June 2011 To Till Date
Education InfromationI) M.Tech VLSI pass out from JBIET in 2011

II) B.Tech ECE pass out from Padmasri Dr.B.V.Raju Institute of Technology in 2006
Area of SpecializationVLSI & Embedded Systems
Subjects handled I) VLSI Design

II) Microprocessor and Microcontroller
ANJANEYULU BORELLI,Assistant Professor
 8-B Anjaneyulu
QualificationB.Tech (ECE) , M.Tech (VLSI)
Email Idanjaneyulu702@gmail.com
Teaching Experience (in Years)0 years
Education Information•M.Tech – ECE(VLSI) from GRIET, Hyderabad-2016.
•BE - ECE from VBIT, Jangaon-2010
Area of SpecializationECE
Seminars/Workshops attended•Attended IIT Guwahati Sponsored One week Workshop On "Control system information " organized by Dept of ECE, SDES, 2014
•Attended ACTII Sponsored One week workshop on “VLSI system design” organized by the Dept. ACTII, Ramnthapur (HYDERABAD).
Mr.RAJU P,Assistant Professor
 9-P Raju
QualificationB.TECH (ECE) , M.Tech (COMMUNICATION SYSTEMS)
Email Idrjreddy2408@gmail.com
Teaching Experience (in Years)2 years
Previous working ExperienceWorked as a Teaching Assistant in Aurora’s Scientific and Technological Institute, from July 2012 to January 2015.
Education Information•M.Tech – ECE(Communication Systems) from VBIT,HYD-2016.
•B.TECH - ECE from VBIT, JANGAON-2008.
Mr. MAMILLA NARESH-ASSISTANT PROFESSOR
 10-M Naresh
QualificationB.Tech (ECE) , M.Tech (VLSI & ES)
Email Idnareshmamilla434@gmail.com
Teaching Experience (in Years)1 year
Previous working ExperienceWorked as Assistant Professor in K.N.R.C.E.R COLLGE OF ENGINEERING, from Dec 2015 to Dec 2016.
Education Information•M.Tech – VLSI & Embedded System from G.Pulla Reddy Engg College (Autonomous) Kurnool -2015.
•B.Tech - ECE from Akshaya Bharathi Institute of Technology Kadapa -2012.
Area of SpecializationVLSI & ES
Subjects HandledVerilog
VLSI Design

Papers Published•Clock Gating Aware Low Power ALU Design published in IJSR volume 4 issue 8 Aug 2015 page 341-345. ISSN 2319-7064.
Mrs.Gangula Swathi-Assistant Professor
 12-G Swathi
QualificationM.Tech (VLSI)
Email Id swathi3185@gmail.com
Teaching Experience (in Years)- 7 years
Previous working ExperienceWorked as Assistant Professor in Christu Jyoti Institute of Technology from 2007 to 2008

Worked as Assistant Professor in ECE Dept at CMR IT, Medchal from June 2008 to Oct 2012.

Worked as Assistant Professor in ECE Dept at Vidya Bharathi Institute of Technology from 2013 Jan to 2015 Oct.
Education InformationM.Tech – VLSI from CMRIT Hyderabad
B.Tech - ECE from Vidya Bharathi Institute of Technology.
Area of SpecializationVLSI
Papers PublishedParallel 2D MRI Image filtering algorithms Implementation for FPGA using Matlab and Xilinx System generator published in IJERA ,VOL 2 , Issue 6, Nov-Dec 2012
Subjects HandledElectronic Devices and Circuits
Pulse and Digital Circuits.
Switching Theory and Logic Design
Analog Communications
Digital Communications
Electromagnetic Theory And Transmission Lines

Seminars/Workshops attended:  Attended two day Work Shop On advanced VLSI Design at CMRIT.
 Attended two day workshop on Analog and Digital VLSI Design using cadence tools at CMRCET
 Attended three day workshop on wireless and optical communications in CMRIT
 Attended day workshop on teaching engineering using LABVIEW at CMRCET
Ms. GUJJULA JHANSI-Assistant Professor
 13-G Jhanasi
QualificationB.Tech (ECE) , M.Tech (VLSI&ES)
Email Idjhansissdr@gmail.com
Teaching Experience (in Years)-
Previous working Experience-
Education Information•M.Tech – VLSI&ES from JNTUH, Hyderabad-2016.
•B.Tech - ECE from JNTUH-2014
Area of SpecializationVLSI&ES
Papers Published•Mobile printer with Bluetooth compatibility using raspberry pi published in IJECS volume 5 issue 10 oct 2016 ISSN 2319-7242.
Mr A.SATHISH-Assistant Professor
 14-A Satish
QualificationB.Tech (ECE) , M.Tech (VLSI & ES)
Email Idalla.satishkumar402@gmail.com
Teaching Experience (in Years)-01 years
Previous working Experience-
Education Information•M.Tech – VLSI & ES from JNTUH, Hyderabad-2015.
•B.Tech - ECE from Sree Rama Institute Of Technology & Science-2012.
Area of Specialization-
Papers Published-
Miss. SHAIK SHAFIYA-Assistant Professor
 15-Shafiya Shaik
QualificationB.Tech (ECE) , M.Tech (ES)
Email Idnhanni448@gmail.com
Teaching Experience (in Years)-
Previous working Experience-
Education Information•M.Tech – ES from JNTUH, Hyderabad-2015.
•B.Tech - ECE from Sree Rama Institute Of Technology & Science-2012.
Area of Specialization-
Papers Published-
Bandaru Bhavana, Assistant Professor
 ECE_BHAVANA
Qualification M.Tech
Email Idbhavana7.minnu@gmail.com
Teaching Experience (in Years)6 Months
Education InformationI) M.TECH (Digital Electronics & Communication Systems) from JNTUACEP, Pulivendula, 2016.


IV) B.Tech. (ECE) from YSR Engineering College,
Yogi Vemana University ,2014.

Area of SpecializationElectronics and Communication Systems
Papers Published Edge preserving based on Weighted Guided Image Filtering published in IJSR VOLUME 5 ISSUE 6 June 2016.
Dr. A. RAJAN, Professor
 ECE_RAJAN
QualificationPh.D
Email Idarurajan79@gmail.com
Experience17 years
Education InformationI) Ph.D. (ECE) form JNTU, Hyderabad, June 2008.

II) M.E. (Applied Electronics) from PSG College of Tech., Bharathiyar university Coimbatore, 1996.

III) GATE - 95.32

IV) B.Tech. (ECE) from RVR&JC College of Engineering, .(N.U , Guntur) 1989.
Courses Attended

I) 5day FDP on Analog CMOS VLSI Design using Cadence Tools Organized by Entuple, Bangalore from Dec7-11.2015



II) 5Days International conference on VLSI Design-2008 and Tutorials at Hyderabad , conducted by VLSI Society of India



III) 5 Days International conference on VLSI Design-2006 and Tutorials at Hyderabad , conducted by VLSI Society of India



IV) One week work shop on DSP Tools and Practice ,IIT, Kharagpur, June 2006



V) One Week work shop on VLSI Design ,Conducted by VLSI Society of India ,Mysore, May 2005



VI) 5 Days International conference on VLSI Design-2005 and Tutorials at Kolkata , conducted by VLSI Society of India



VII) 2Week STTP on DSPAA at NIT, Warangal (Mar 2004)



VIII) 3 Day workshop on Microprocessors and Microcontrollers, GNITS, Hyderabad (Dec2003)



IX) 2Week STTP on VLSI design at REC, Warangal(Oct 02)



X) 3 day Workshop on VLSI design at ISSCT Hyderabad(Jan 01)



XI) 2 Week STTP on High speed Networks at REC Wgl(Oct 99)

Guest lecturers delivered

I) High level over view of VLSI Design at Vagdevi Engg. Colllege, Warangal, 29th March,2008



II) Analog IC Design, UGC refresher course on VLSI design and Embedded systems at Academic Staff College ,JNTU ,Hyderabad 28,29Dec 2007



III) Layout design rules at UGC refresher course on VLSI design and Embedded systems at Academic Staff College ,JNTU ,Hyderabad Dec 2005



IV) Layout design rules at UGC refresher course on VLSI design and Embedded systems at Academic Staff College ,JNTU ,Hyderabad.23rd Nov' 2004



V) Micro Controllers Architecture &Programming at AICTE- ISTE -STTP on Mcro Controllers and its Applications ,KITS, warangal 7th,8th,9th June 2004



VI) Design rules at VLSI Design workshop at GNITS, Hyderabad on 15thDec'04



VII) VHDL at VHDL work shop at KITS ,Warangal 17th & 18th Feb '2003

Publications-Journals

I) Design of STT-RAM cell in 45nm hybrid CMOS/MTJ Int. Jou. Of Science and Engg Applications ISSN-2319-7560 (Vol.3 Issue 3 May-June2014 Pp 49-52



II) An Alternative Logic Approach to Implement Energy Efficient 90-Nm CMOS full adders Int Jou of Scientific research ISSN 2277-8179Vol 2 Issue 10 Oct Pp 70-73



III) Design of an Efficient Reversible Logic Based Bidirectional Barrel shifter International Journal of Electronics Signals and systems (IJESS) ISSN: 2231-5969 Vol-2, 2,3,4,, 2012, p.p.No. 48-53.



IV) Optimum Decimation and Filtering for reconfigurable Sigma Delta ADC Far East Journal of Electronics and Communications ISSN 0973-7006Volume 11, Issue2Dec 2013 Pages 101 - 111



V) An Alternative Logic Approach to Implement Energy Efficient 90-nM CMOS Full Adders International Journal of Scientific Research(IJSR)ISSN 2277-8179Vol. 2Oct 2013Pp 1-3



VI) An Improved Optimization Techniques for Parallel Prefix Adder using FPGA .Techniques for Parallel Prefix Adder using FPGA International Journal of Modern Engineering Research (IJMER) www.ijmer.com Vol. 3, Issue. 5, Sep - Oct. 2013 pp-3107-3115 ISSN: 2249-6645 International Journal of Modern Engineering Research (IJMER) ISSN: 2249-6645 Vol.3 issue 5 2013 pp-3107-3115



VII) A Novel Architecture of LUT Design Optimization for DSP Applications International Journal of Advanced Electrical and Electronics Engineering, ISSN (Print): 2278-8948Vol.-1, Issue-22012 p.p No 1-6



VIII) Analysis on Digital Implementation of Sigma-Delta ADC with passive analog components International Journal of Computing and Digital systems: ISSN 2210-142XVol. 2 2013 Pp 71-77



IX) Design and Implementation of Reversible Logic Based Bidirectional Barrel Shifter 978-1-4673- 2396- 3/12 IEEE-ICSE2012 Proc., 2012, Kuala Lumpur, Malaysia.2012 p.p. 490-494



X) Design of Low power high speed segmented DAC Technology Spectrum, Journal of JNTU, Vol..2,No.3June 2008



XI) Power Optimization in Flash ADCs "Far East International Journal of EC ISSN 0973 –7006,Vol.No.3,Dec2008



XII) Design and Simulation of Voltage to Current Converter, "Technology Spectrum, Journal of JNTU,Vol. 1, No.2 , July 2007



XIII) Design and Simulation of Differential Mode CMOS Voltage to Current Converter LE Journal of Laboratory experiments Vol. 7,NO.3Sept2007 pp 220-224

Conferences

I) A Novel Approach or Design and Implementation of Sequential Multiplier, International conference on Challenges and Emerging trends in Management&Technology-2015, NNRES, Hyderabad on 12th Dec, 2015.



II) Selecting Low power High speed Differential I/o for Continuous Time Sigma Delta ADC on VIRTEX-4 FPGA, International conference on Challenges and Emerging trends in Management&Technology-2015, NNRES, Hyderabad on 12th Dec, 2015.



III) H-spice modeling FPGA Low voltage Differential I/Os:LVDS,HSL-Ii and LVPECL for SD-ADC, International conference on Advanced Communications, VLSI and Signal Processing, 11th April2015 , G Pullaiah college of Engineering& Technology.



IV) Design and Implementation of Area optimized AES with S-Box Resource sharing based on FPGA IETE Zonal seminar cum National symposium, Hyderabad28-30March 2014



V) A Novel Architecture of LUT Design optimization for DSP Applications." International conference on Electrical Electronics & Computer Science, ISBN: 987-9381361-17-7,28th August, 2012, GOA, p.p. No. 17-22



VI) Design of An Efficient Reversible Logic Based Bidirectional Barrel shifter", International Conference in Electronics and Communication Engineering, ISBN: 978-93-81693-29-2, 20th May 2012, Bangalore p.p.No. 108-114.



VII) Low Power Design of Asynchronous protocol Converters for Two-phase Communications" day National Conference on Recent Trends and Advances in Nano Technology, Guru Nanak Engineering College, Hyderabad.. 29th July, 2011



VIII) 65dB SFDR, 500kS/s Continuous time All Digital Sigma Delta ADC for SONOR Applications Peer jubilee international conference on Navigation and Communication NAVCOM2012 Hyderabad Dec 20-21. 2012328-331



IX) High Speed differential amplifier based comparator for future FPGA/ASIC integrated sigma Delta ADC IEEE ICARETFeb8-9th 2013,365-369



X) Performance Analysis of First order Digital Sigma Delta ADC 4th International conference on computational Intelligence, Communication systems and Netwotks978-0-7695-821CICSyN0/12@2012 IEEE 2012 435-440



XI) A New Frame Work on Novel Area Efficient FPGA Architecture for FIR Filtering with Symmetric Signal Extension, International conference on Advances in computing, communication and information Technologies ACCIT-2010, Dec 2010 ,Bangalore



XII) Techniques to reduce power consumption in memories National level Symposium , Bhoj Reddy College of Engg . Hyderabad, Feb 2003



XIII) Performance Review of CMOS ADCs, National Conference, NCVRGwalior (Feb'04)



XIV) A technique to reduce power consumption in Flash ADCs 4.National conference NCAC ,PSG College of Tech Coimbatore Dec 2005



XV) Design and simulation of CMOS Voltage to current converter IETE Zonal seminar, Vishakapatnam Feb 2007



XVI) Design of low power CMOS transconductor6.,International Conference on simulation and modeling,CIT, Coimbatore, Aug - 2007



XVII) Design of Low power high speed segmented DAC,7International Conference on simulation and modeling ,CIT, Coimbatore, Aug 2007

Dr.B.C.PREMKUMAR, Professor
 PREMKUMAR_ECE
Faculty name:Dr.B.C.PREMKUMAR
Qualification:Ph.D.
Teaching Experience 23 years
E-mail Id :pramukhatech15@gmail.com
Area ofSpecialization Embedded systems
Education Information:

II) M.Tech – Power Electronics from University of Visvesvaraya College Engineering, Bangalore University -2007.
III) B.Tech - ECE from YSR Adichunchanagiri Institute of Technology, Mysore University -1995.

Subjects Handled

I) RF and Microwave Engineering
II) Electron devices & Circuits
III) Signals and system
IV) Embedded systems
V) Digital system and design
VI) Linear Integrated Circuits
VII) Electromagnetic field
VIII) Communication Systems
IX) Transmission line and wave guide
XI) Measurement & Instrumentation
XII) Digital Image Processing
XIII) Wireless Communication
XIV) Antenna and wave propagation
XV) Medical electronics
XVI) Artificial intelligence


List of International Journal Paper publications

I) “Forked Embedded System Models for Automotive Airbag Control System”, International Journal of Applied Engineering Research, ISSN 0973-4562, Volume 10, Number 12, 2015, pp. 31845-31854, (Scopus Indexed Journal).

II) “Performance Improvement in Nonlinear Control System Using RTOS”, International Journal of Applied Engineering Research, Volume 10, Number 19, 2015, pp. 40307-40314, (Scopus Indexed Journal).

III) “Image based Heart Murmur classification using Hamming distance measure”, ARPN Journal of Engineering and Applied Sciences, 2006-2015, Volume 10, Number 18, 2015, ISSN 1819-6608, (Scopus Indexed Journal).

IV) “Augmented Reality based heart murmur classification”, International Journal of Applied Engineering Research, Volume10, Number 15, 2015, pp 35791-35796, (Scopus Indexed Journal).

V) “Image Based Heart Murmur Classification Using Acoustic Wave Pattern”, International Journal of Applied Engineering Research, Volume 10, Number 15, 2015, pp 35020-35026, (Scopus Indexed Journal).
List of Papers published in International Conference (IEEE)

I) “Design & Implementation of Real Time Vehicle Monitoring & Tracking System on Google Map & an Auto Electronic Mail Alert”, 2015 IEEE International Conference Engineering and Technology, CETECH_CS939, pp 147, 20th March 2015, Coimbatore, Tamil Nadu, India.

II) “Detection of Heart Abnormality Using Image Based Heart Sound Signal With Augmented Reality”, International Conference on Advanced Material Technologies (ICAMT) - 2016, 27th and 28th December 2016, Dadi Institute of Engineering and Technology (DIET), Visakhapatnam, Andhra Pradesh, India.
Attended National Level workshops, Seminars & Conferences

I) “Skill Development systems for Workforce , Engineers and Managers”, Alva’s IET, Moodbidri, DK.

II) “Xenics software Development Program” at BMSCE Bangalore

III) “Recent Trends in Wireless Communication” at SRSIT, Bangalore

IV) Attended National Level 3 days Seminar on DSPA @ BIT, Bangalore

V) “Ramanujan Lecture Series” , SET, Jain University, Bangalore


Attended International Level workshops, Seminars & Conferences

I) The IET pinkerton lecture 2012 on “Connecting Computers with the Human Brain” Prof. KevinWarwick, U.K.

II) IET Events “Data Center Design & Audit 2012”- Matt Flowerday, Founding Director, Capitoline LLP.

III) IET Energy Lecture 2012-George Tom, UK.

IV) IET Wheatstine Lecture-2012 IET Linkeden lecture series, Bangalore .
V) IET Linkeden lecture series, Bangalore.

VII) “Research Design & The Nuances of Thesis writing”- Dr, Florian Schweizer U,K

VII) IBM-ISA CXO conclave , Role of semiconductor fab in Electronic systems Design & manufacture ,Bangalore –Dr. Garypattern ,vice president, IBM-Dr. DavidHarame, Newyork

VIII) Acclerated New Products Developments for Emerging markets, Bangalore, Rajukondunu. R & Sivakumar

Extra Curriculum Activities

I) Chief Guest for ISTE-events

II) Delivered Technical Talks at various Engineering Colleges

III) Coordinator for Citronics club

IV) Coordinator for Sports and Cultural Activities

V) Session Chair for IEEE – International Conferences

Faculty development activities (Attended/Conducted)

I) Two day workshop for Current Trends in Signal Processing Jain University

II) One week VTU, UGSTT Faculty Development Program On mechanical measurement Systems, City Engineering College, Bangalore

III) Attended the Faculty Development program in KSIT Bangalore

IV) Attended the Faculty Development program in KSGI Bangalore

V) Attended Faculty Development Program @ City Engineering College, Bangalore.

Administrative activities

I) Chief superintendent of Examinations, DTE Board, Bengalore

II) Deputy Chief superintendent for VTU- Examinations

III) Squad member for VTU- examinations

IV) Moderator for VTU -Theory examinations

V) External and Internal Examiner for VTU- practical examinations

VI) Question paper setter & Moderator for VTU -theory examinations

VII) Chief Custodian for Examination section, SET, Jain university, Bangalore

VIII) Project proposals- VGST coordinator

IX) Admission and placement coordinator

X) Professional Form Coordinator

XI) ISTE-Section Managing Committee member, Karnataka Section ,INDIA

XII) ISTE & IETE Form coordinator


Life Membership

I) Institute for Engineering & Technology (M.I.E.T) , U.K

II) Indian Society for Technical Education (M.I.S.T.E), New Delhi.

III) International Institute of Education & Management (IIEM), New Delhi.

IV) Center for Education Growth and Research(MCEGR), New Delhi

Research Experience6 years

I) Research title “Efficient real Time control strategies for Non linear automotive systems” Dr. MGR Educational and Research Institute, Dr. MGR University, Chennai-01.Research Domain Area: Embedded systems, Automotive Electronics and Power Electronics.

II) Professional Achievements: Elected as Section Managing Committee Member(SMC)-ISTE, For the term 2015 to 2019, Karnataka section, New Delhi. India

Awards received

I) BEST EDUCATIONIST AWARD
International Institute of Education & Management, New Delhi, August – 2014.

II) GOLDEN EDUCATIONIST OF INDIA AWARD
International Institute of Education & Management, New Delhi, October – 2014.

III) GLORY OF EDUCATION EXCELLENCE AWARD
Outside the College Activities

I) Chief Guest for ISTE program, PES College of Engineering, Mandya.

II) Delivered Technical Talk on “Importance of Cycloconverter for Frequency changer in Power Electronics” at GMIT, K.M.DODDI, Mandya.

III) ISTE- Faculty Convention , External Judge for Paper Presentation Competition.

Mr. A.ROHIT YADAV, ASSISTANT PROFESSOR
 Rohith_ECE
Faculty name:Mr. A.ROHIT YADAV
Qualification:M. E
Teaching Experience: 3.5 years
E-mail Id :rohit47474@gmail.com
Area ofSpecialization: Embedded systems and VLSI Design
Education Information:

II) •B.Tech - ECE from V.I.S.T Engineering college -2011.

Conferences / Seminars attended:

I) Published monitoring and controlling the crop field using Zigbee networks paper in 3rd national conference on modern trends in electronic communication & signal processing 2013.


M.Ravi, ASSISTANT PROFRESSOR
 Ravi_ECE
Faculty name:M.Ravi
Qualification:M.Tech
Teaching Experience: 4.5 years
E-mail Id :ravi.m@nnrg.edu.in
Education Information:

II)B.Tech - ECE from Nagarjuna Institute of Science & Technology, JNTUH University -2009

Opportunities Telecom-Industry
One-Day- Paripathana”-Circuit-Designing
One Day Workshop hands On Training
“Pradarshana”-Paper-Presentation
Counselling Code
NNRG Counselling Code
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