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Electronics & Communication Engineering

Faculty

Dr. Chantigari V K Reddy, Director
 Mr PANATI S SRINIVAS REDDY HOD
QualificationM.E, Ph.D
Email Iddirector@nnrg.edu.in
Experience26 years
Education InformationI) Ph.D. (ECE) form JNTU, Hyderabad, June 2008.

II) M.E. (Applied Electronics) from PSG College of Tech., Bharathiyar university Coimbatore, 1996.

III) B.Tech. (ECE) from RVR&JC College of Engineering, .(N.U , Guntur) 1989.
Administrative Assignments

I) Director, Nalla Narasimha Reddy Education Society’s Group of Institutions, Hyderabad from Sept 2011 to till date


II) Council member IETE (co-opted) from 2012 to 2014


III) Dean, School of Engineering, Nalla Narasimha Reddy Education Society’s Group of Institutions, Hyderabad from July 2010 to Aug 2011


IV) Chairman IETE Warangal, Sub Centre from 2008- 2010


V) Principal, VSM Engineering College, Hyderabad from May 2008 to April 2010


VI) Head of ECE dept , KITS Warangal from April 2005 to May2008


VII) Chairman , Board of Studies ECE , Kakatiya University, Warangal-2007-2008


VIII) Honorable Secretary IETE Warangal Sub Centre from 2003-2008


IX. Member, Board of Studies EIE, ECE, Kakatiya University , 2003-2007

Publications-Journals

I) Dr. C V Krishna Reddy, Design of STT-RAM cell in 45nm hybrid CMOS/MTJ, IJSEA, Volume 3 Issue 3 May-June 2014.



II) Dr. C V Krishna Reddy, Optimum Decimation and Filtering for reconfigurable Sigma Delta ADC, Far East IJEC, Volume 11 Issue 2 December 2013.




III) Dr. C V Krishna Reddy, An Alternative Logic Approach to Implement Energy Efficient 90-Nm CMOS full adders, IJSR, Volume 2 Issue 10 October 2013.



IV) Dr. C V Krishna Reddy, An Improved Optimization Techniques for Parallel Prefix Adder using FPGA Techniques for Parallel Prefix Adder using FPGA, IJMER, Volume 3 Issue 5 September-October 2013.




V) Dr. C V Krishna Reddy, Analysis on Digital Implementation of Sigma-Delta ADC with passive analog components, IJCDS, 2013.



VI) Dr. C V Krishna Reddy, Design and Implementation of Reversible Logic Based Bidirectional Barrel Shifter, IEEE-ICSE, 2012.



VII) Dr. C V Krishna Reddy, Design of an Efficient Reversible Logic Based Bidirectional Barrel shifter, IJESS, Volume 2 Issue 2,3,4 2012.



VIII) Dr. C V Krishna Reddy, A Novel Architecture of LUT Design Optimization for DSP Applications, IJAEEE, Volume 1 Issue 2 2012.



IX) Dr. C V Krishna Reddy, Power Optimization in Flash ADCs, Far East IJEC, December 2008.



X) Dr. C V Krishna Reddy, Design of Low power high speed segmented DAC, Technology Spectrum, Journal of JNTU, Volume 2 Issue 3 June 2008.



XI) Dr. C V Krishna Reddy, Design and Simulation of Voltage to Current Converter, Technology Spectrum, Journal of JNTU, Volume 1 Issue 2 July 2007.



XII) Dr. C V Krishna Reddy, Design and Simulation of Differential Mode CMOS Voltage to Current Converter LE, IJLE, Volume 7 Issue 3 September 2007.



Conferences / Seminars & Workshops attended

I) Ten Days Workshop on Aspects of IC Design at NIT Warangal, from 8th February to 17th February, 2016.

II) Presented a paper on A Novel Approach or Design and Implementation of Sequential Multiplier in an international conference ICCETMT-2015 organized by NNRG- Hyderabad on 12th December, 2015.

III) Five days Faculty Develop Program on Analog CMOS VLSI Design using Cadence Tools, Organized by Entuple, Bangalore from 7th December to 11th December, 2015.

IV) Presented a paper on Selecting Low power High speed Differential I/o for Continuous Time Sigma Delta ADC on VIRTEX-4 FPGA in an international conference ICCETMT-2015 organized by NNRG- Hyderabad on 12th December, 2015.

V) Presented a paper on H-spice modeling FPGA Low voltage Differential I/Os:LVDS,HSL-Ii and LVPECL for SD-ADC in an international conference on Advanced Communications, VLSI and Signal Processing organized by GPCET on 11th April, 2015.

VI) Presented a paper on Design and Implementation of Area optimized AES with S-Box Resource sharing based on FPGA in an IETE Zonal seminar cum National symposium – Hyderabad, March 2014.

VII) Presented a paper on High Speed differential amplifier based comparator for future FPGA/ASIC integrated sigma Delta ADC in an IEEE international conference ICARET on 8th and 9th February 2013.

VIII) Presented a paper on Low 65dB SFDR, 500kS/s Continuous time All Digital Sigma Delta ADC for SONOR Applications in an international conference NAVCOM2012, Hyderabad on 20th and 21st December, 2012.

IX) Presented a paper on A Novel Architecture of LUT Design optimization for DSP Applications in an international conference on Electrical Electronics & Computer Science, at Goa on 28th August, 2012.

X) Presented a paper on Design of an Efficient Reversible Logic Based Bidirectional Barrel shifter in an international conference on Electronics and Communication Engineering at Bangalore on 20th May, 2012.

XI) Presented a paper on Performance Analysis of First order Digital Sigma Delta ADC in a 4th IEEE international conference CICSN, 2012.

XII) Presented a paper on Low Power Design of Asynchronous protocol Converters for Two-phase Communications in a national conference RTANT-2015 organized by GNEC- Hyderabad on 29th July, 2011.

XIII) Presented a paper on A New Frame Work on Novel Area Efficient FPGA Architecture for FIR Filtering with Symmetric Signal Extension in an International Conference ACCIT, Bangalore, December 2010.

XIV) Five days International conference on VLSI Design and Tutorials at Hyderabad, conducted by VLSI Society of India, 2008.

XV) Presented a paper on Design of low power CMOS transconductor in an International Conference on simulation and modeling, CIT, Coimbatore, August 2007.

XVI) Presented a paper on Design of Low power high speed segmented DAC in an International Conference on simulation and modeling, CIT, Coimbatore, August 2007.

XVII) Presented a paper on Design and simulation of CMOS Voltage to current converter in an IETE Zonal seminar - Vishakhapatnam, February 2007.

XVIII) Five days International conference on VLSI Design and Tutorials at Hyderabad, conducted by VLSI Society of India, 2006.

XIX) One week workshop on DSP Tools and Practice at IIT, Kharagpur, June 2006.

XX) Presented a paper on A technique to reduce power consumption in Flash ADCs in a national conference NCAC organized by PSGCT- Coimbatore, December 2005.

XXI) One Week workshop on VLSI Design, Conducted by VLSI Society of India, Mysore, May 2005.

XXII) Five days International conference on VLSI Design and Tutorials at Kolkata, conducted by VLSI Society of India, 2005.

XXIII) Two weeks STTP on DSPAA at NIT, Warangal, March, 2004.

XXIV) Presented a paper on Performance Review of CMOS ADCs in a national conference NCVR – Gwalior, February 2004.

XXV) Three days National Workshop on Microprocessors and Microcontrollers at GNITs, Hyderabad, December 2003.

XXVI) Presented a paper on Techniques to reduce power consumption in memories in a national level Symposium organized by BRCE- Hyderabad, February 2003.

XXVII) Two weeks STTP on VLSI design at REC, Warangal, October, 2002.

XXVIII) Three days National Workshop on VLSI design at ISSCT, Hyderabad, January 2001.

XXIX) Two weeks STTP on High speed Networks at REC, Warangal, October, 1999.

Guest lecturers delivered

I) High level over view of VLSI Design at Vagdevi Engineering College, Warangal on 29th March, 2008.


II) Analog IC Design, UGC refresher course on VLSI design and Embedded systems at Academic Staff College, JNTU, Hyderabad on 28th and 29th December, 2007.


III) Layout design rules at UGC refresher course on VLSI design and Embedded systems at Academic Staff College, JNTU, Hyderabad, December, 2005.


IV) Layout design rules at UGC refresher course on VLSI design and Embedded systems at Academic Staff College, JNTU, Hyderabad on 23rd November, 2004.


V) Micro Controllers Architecture &Programming at AICTE- ISTE -STTP on Micro Controllers and its Applications ,KITS, Warangal from 7th to 9th June 2004.


VI) VHDL at VHDL work shop at KITS, Warangal on 17th & 18th February, 2003.


VII) Design rules at VLSI Design workshop at GNITS, Hyderabad on 15th December, 2004.

Patents filed

I) Title of the Invention: Washing Machine : 201741035618A,20-10-2017,36890

II) Title of the Invention: Transportation Management System: 201741042490A,8-12-2017, 47224


Professional MembershipsI) S.M.I.E.E.E

II) F.I.E.T.E

III) M.I.S.T.E
Dr. M A KHADAR BABA, Professor & Head of the Department
Dr. M A KHADAR BABA ece hod
QualificationPh. D.
Email Idkhadarbaba.ma@nnrg.edu.in
Experience28 Years
Administrative Assignments:

I) Head of ECE Department GNI Technical Campus Since June 2015 to August 2017.

II)Head of ECE Department CMRCET Since November 2011 to May 2015.

III) Head of ECE Department GNEC Since July 2008 to October 2010.

IV) Chairman, Board of studies ECE, CMRCET Hyderabad during 2014-15.

V) Member, Board of studies ECE, GNITC Hyderabad during 2015-17.


Education InformationI) Ph. D. (ECE) from GITAM University,Vishakapatnam in 2016.

II) M.E (Microwave & Radar Engineering) from College of Engineering, Osmania University, Hyderabad in 2003.

III) B. Tech (ECE) from Deccan College of Engineering (OU), Hyderabad in 1988
Area of SpecializationMicrowave & Radar Engineering and Communications
Books PublishedI) Adaptive Equalization Techniques to Estimate GAGAN Signals, LAMBERT Academic Publishing, Germany, ISBN: 978-620-2-05256-6. Year: 2017.

II) A text book on Electronic Components, Falcon Publishers, Hyderabad in the year 1997.
Conferences/ Workshops/ Refresher courses conductedI)Convener – 4th, 5th& 6th International conferences organized at GNITC Hyderabad during the years 2015, 2016 & 2017.

II)Convener – Faculty Development programme on Analog VLSI Design using Cadence Tools at CMR College of Engineering & Technology, Hyderabad from 18th to 24thDecember, 2014.

III)Convener – workshop on PCB Design and Fabrication at CMR College of Engineering & Technology from 30th October to 5th November, 2014.

IV) Convener – National Conference at CMR College of Engineering &Technology from 24th& 25th January, 2014.

V) Convener – Faculty Development Programme on Embedded Systems at CMR college of Engineering & Technology, Hyderabad from 07th to 09th August, 2013.

VI) Convener – workshop on Simulation Lab using MATLAB at CMR college of Engineering & Technology, Hyderabad from 16th to 18th August, 2012.

VII) Convener – workshop on CADENCE Tools at CMR college of Engineering & Technology, Hyderabad from 12th to 14th July, 2012.

VIII) Coordinator – National Conference at CMR College of Engineering & Technology, from 8th to 10th July, 2011.

IX) Convener – 1st international conference at Guru Nanak Engineering College, Hyderabad from 10th to 13th June, 2010.

X) Convener – Two days workshop on VLSI design at Guru Nanak Engineering College, Hyderabad from 4th to 5th September, 2008.

XI) Coordinators – short term Course on Microwave Techniques, at SNIST Hyderabad from 9th to 11th October, 2006.
Papers PublishedI)Dr. M. A. Khadar Baba, Design and Testing of Biconical Antenna, IJRTER, December 2017.

II)Dr. M. A. Khadar Baba, A Survey on Energy Efficient Base Station Sleeping Techniques in Green Communications, IJRTER, December 2017.

III)Dr. M. A. Khadar Baba, Signal coding approach for GPS aided Geo augmented Navigation (GAGAN) system for aircraft Navigation, IJWCS, Volume 4 Issue 1 January-June 2012.

IV)Dr. M. A. Khadar Baba, GAGAN signal estimation for Progressive signaling in satellite application – Extended filtration approach, International Science Press, IJECEE, Volume 3 Issue 2 July-December 2012.

V)Dr. M. A. Khadar Baba, Design and implementation of Electronic Voting System using finger print And Zig bee, IJARI, Volume 2 Issue 9 September 2013.

VI)Dr. M. A. Khadar Baba, GAGAN Signal Estimation over a variable data rate, International Science Press, IJCCS, Volume 1 Issue 2 March 2013.

VII)Dr. M. A. Khadar Baba, Secured Wireless Communication for Industrial Automation and Control, IJARI, Volume 2 Issue 1 September 2013.

VIII)Dr. M. A. Khadar Baba, Micro controller based cryptosystem with key generation unit, IOSR-JEEE, Volume 4 Issue 2 January-February 2013.

IX)Dr. M. A. Khadar Baba, Modified LMS Approach to signal Estimation in GPS Aided Geo Augmented Navigation, IJACEEE, Volume 3 Issue 2 March 2014.

X)Dr. M. A. Khadar Baba, Subthreshold Dual Mode Logic, Builetin of Electrical Engineering and Informatics, Volume 3 Issue 2 June 2014.

XI)Dr. M. A. Khadar Baba, Estimation of Global Positioning System Measurement Errors for GAGAN Applications, IOSR-JECE, Volume 9 Issue 6 November – December, 2014.

XII)Dr. M. A. Khadar Baba, Design and Implementation of Embedded Web server Based on Arm and Linux, IJACEEE, Volume 3 Issue 2 April - September, 2014.


Conferences / Seminars & Workshops attended

I)Presented a paper on Design and Testing of Biconical Antenna in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II)Presented a paper on A Survey on Energy Efficient Base Station Sleeping Techniques in Green Communications in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III)Presented a paper on IR Remote Controlled Water Robot using ARM -7, in an International conference on Industrial Scientific Research Engineering (IISRC), Conference No. 3, September 2013.

IV)Presented a paper on BER estimation for variable SNR in GAGAN application in a National Conference on Computing Communication & Instrumentation (NCCCI- 12) organized by GITAM University, Hyderabad on 21st & 22nd December 2012.

V)Presented a paper on GAGAN Signal Estimation over a variable data rate, in an International conference on Computing, Communications, Systems and Aeronautics (ICCCSA -2012) organized by Dept. Of ECE, Malla Reddy College of Engineering &Technology, Hyderabad on 30th and 31st March 2012.

VI)Presented a paper on GAGAN Signal Estimation over a Highly Variant channel in a National Conference Advances in Communication, Navigation and Computer Networks (ACNCN -2012) organized by Dept. of ECE Andhra University on 17th and 18th March 2012.
VII)Presented paper on Acquisition and Tracking of GPS signal in a National Conference on Advances in Communication Technologies (NCACT-12) GIT, GITAM University, 2012.

VIII)Presented paper on Effective Estimation of Signal in GAGAN system in a National Conference on Advances in Communication Technologies (NCACT-12) GIT, GITAM University, 2012.

IX)Presented paper on Generations from Mini-Clouds to Clouding Computing in a National Conference on Emerging Technologies and Tools in Mobile Phone Applications conducted by Department of CSE at Annamacharya Institute of Science & Technology, Hyderabad from 21st & 22nd October 2011.

X)Presented paper on Trust Computing Enviroment Model in Cloud Architecture in a National Conference on Emerging Technologies and Tools in Mobile Phone Applications conducted by Department of CSE at Annamacharya Institute of Science & Technology, Hyderabad on 21st & 22nd October 2011.

XI)Three days National Workshop on Teaching Engineering Using LABVIEW at CMR College of Engineering &Technology, Hyderabad from 22nd to 24th June, 2011.

XII)Presented paper on Performance of measure of Uni-biometric – Iris recognition system based on FAR, FRR, FTC, FTE and HTER, at 1st International conference on Emerging trends in Signal Processing &VLSI Design organized by ECE Department, Guru Nanak Engineering College, Hyderabad, from 11th to 13th June 2010.

XIII)Presented paper on Significance of Signal to noise ratio in the context of GAGAN applications, at 1st International conference on Emerging trends in Signal Processing &VLSI Design organized by ECE Department, Guru Nanak Engineering College, Hyderabad from 11th to 13th June 2010.

XIV)Presented paper on USB transceiver macro cell interference implementation on FPGA, at 1st International conference on Emerging trends in Signal Processing &VLSI Design organized by ECE Department, Guru Nanak Engineering College, Hyderabad, from 11th to 13th June 2010.

XV)Presented paper on Adaptive array signal processing for GPS interference rejection in 41st Mid –term symposium on Tracking the Telecom and IT revolution to rural India – Bridging the Digital divide, organized by IETE center, S V. University, Tirupati, on 9th and 10th April 2010.

XVI)Two days National Workshop on VLSI – Chip Design at Guru Nanak Engineering College, Hyderabad on 4th and 5th September, 2008.

XVII)Presented paper on Performance Analysis of Turbo- SPC Codes in Wireless Communication, in a National conference on Recent Trends in Electronics and Communications conducted by Department of Electronics & Communication Engineering, G. Pulla Reddy College of Engineering, Kurnool on 25th January 2007.

XVIII)Three days National Workshop on TCP/IP Networks &Protocols at JNTU, Hyderabad from 6th to 8th December, 2006.

XIX)One week National Workshop on Analog Integrated Circuit Design at NIT, Warangal from 26th June to 1st July, 2006.

XX)Two days National Workshop on Latest Technologies in Electronic Communications (WOLTEC) at MVGR college of Engineering, Vijayanagaram on 12th and 13th March, 2005.

XXI)Presented paper on Estimation of White Blood Cells Using Microwaves, in an International conference on Bio-Medical Electronics and Telecommunications organized by Dept. of ECE & Centre College of Engineering, Andhra University, Visakhapatnam, December 2004.

XXII)One day Seminar on Smart Antennas for Wireless Communications at NERTU, Osmania University on 16th December, 2002.




Projects Guided

I) B. Tech – 38

II) M. Tech – 18


MembershipsI) FIETE

II) MISTE
Industry ExperienceGraduate Apprentice trainee at Hindustan Ship Yard Limited, Visakhapatnam from October 1989 to October 1990.
Dr. P. Subbaiah,Professor
1- P Subbaiah
QualificationPh. D.
Email Idsubbaiah.p@nnrg.edu.in
Experience23years
Education InformationI) Ph. D. (ECE) from Sri Krishna Devaraya University, Ananthapur, 2007.

II) M. E (Digital Systems Computer Electronics) from J.N.T.U, Hyderabad in 2001.

III) B. E (ECE) from G. Pullareddy Engineering college (S.K.D university), Kurnool in 1992.
Area of SpecializationInstrumentation.
Subjects HandledI) Electronic Devices and circuits

II) Very Large Scale Integrated Circuits

III) Signals and system

IV) Microprocessor and Microcontroller

V) Digital system and design

VI) Linear Integrated Circuits

VII) Electromagnetic field

VIII) Communication Systems

IX) Transmission line and wave guide

X) Measurement & Instrumentation

XI) Digital Image Processing

XII) Wireless Communication

XIII) Computer Networks

XIV) Satellite Communication
Papers PublishedI) Dr. P.Subbaiah, Application of Evaluation Parameters for Successful Transmission in Wireless Sensor Networks, IJRTER, December 2017.

II) Dr. P.Subbaiah, A Power Regulation and Harmonic Current Elimination Approach for Parallel Multi-Inverter Supplying IPT Systems, IJRTER, December 2017.

III) Dr. P.Subbaiah, Forked Embedded System Models for Automotive Airbag Control System International Journal of Applied Engineering Research, 2015.

IV) Dr. P.Subbaiah, Performance Analysis of Screening Liver Tumors Using Image Fusion and Neural Network Classifier, International Journal of Applied Engineering Research, 2015.

V) Dr. P.Subbaiah, A Survey on Liver Tumor Detection And Segmentation Methods ARPN Journal of Engineering and Applied Sciences, 2015.

VI) Dr. P.Subbaiah, Tuning and Analysis of Multiple Interactive Loop Process by Model Predictive Control, International journal of engineering technology, 2014.

VII) Dr. P.Subbaiah, Rotor Position Of Switched Reluctance Motor Using Sensorless Method, Journal of Theoretical and Applied Information Technology, 2014.

VIII) Dr. P.Subbaiah, Design Implementation and Hardware Structure for Image Enhancement and Surface Roughness with Feature Extraction Using Discrete Wavelet Transform, Journal of Computer Science, Science Publication, 2014.

IX) Dr. P.Subbaiah Neural Model For Image Enhancement Using Discrete Wavelet Transform International Journal of Electrical, Electronics and Data Communication, 2014

X) Dr. P.Subbaiah, High Speed Charging and Discharging Current Controller Circuit to Reduce Back emf by Neuro Fuzzy Logic, International Journal of Applied Engineering Research, 2014.

XI) Dr. P.Subbaiah, Tuning of Nonlinear Model Predictive Control for Quadruple Tank Process, Journal of Theoretical and Applied Information Technology, 2014.

XII) Dr. P.Subbaiah, Mobility scenario-based Performance Evaluation of Preemptive DSRProtocol for MANET, WSEAS transactions on communications, 2013.

XIII) Dr. P.Subbaiah, Centralized and Decentralized of Quadruple Tank Process, International journal of computer applications IJCA, 2013.

XIV) Dr. P.Subbaiah, Linear and Nonlinear Model Predictive Control of Quadruple Tank Process, International journal of computer applications IJCA, 2013.

XV) Dr. P.Subbaiah, Integrated Noise Removal Filter for Switched Reluctance Motor (SRM), International Journal of Computer Applications, 2013.

XVI) Dr. P.Subbaiah, Non Linear Image Processing with Evolvable Hardware Filter, Indian Journal of Applied Research, 2013.

XVII) Dr. P.Subbaiah, Energy management scheme with load balancing for Preemptive Dynamic source routing protocol for MANET, Journal of Theoretical and Applied Information Technolog, 2013.

XVIII) Dr. P.Subbaiah, Roughness Prediction with Denoising Using Wavelet Filter. International Journal of Advances in Engineering & Technology (IJAET), 2012.

XIX) Dr. P.Subbaiah, Energy efficient preemptive dynamic source routing protocol for MANET, IJCET, June 2012.

XX) Dr. P.Subbaiah, Mobility scenario-based performance evoluation of preemptive dsr protocol for manet. JCET, 2012.

XXI) Dr. P.Subbaiah, Comparative study for quadruple tank process with co-efficient diagram method, .IIJECS, 2012.

XXII) Dr. P.Subbaiah, FLC based Speed control of SR Motor with Neural network based rotor angle estimation, International Journal OfCiit, 2012.

XXIII) Dr. P.Subbaiah, E-coupled Control Strategies’ for Quadruple Tank process ,International Journal OfCiit, 2012.

XXIV) Dr. P.Subbaiah, Novel Approach for Cache Management for Reactive Routing Protocols in Mobile Ad-hoc Networks, National Journal of Computer Science & Technology, 2011.

XXV) Dr. P. Subbaiah, Secured Preemptive DSR(S-PDSR): An Integration of SRP and SMT with Preemptive DSR for Secured Route Discovery, IJASUC, 2010.

XXVI) Dr. P. Subbaiah, Performance Comparison and Analysis of Preemptive-DSR and TORA, IJASUC, 2010.

XXVII) Dr. P.Subbaiah, A Novel Optimization of Route Discovery in Dynamic Source Routing (DSR) Protocol for MANET, Global Journal of Computer Science and Technology, 2010.

XXVIII) Dr. P.Subbaiah, Achieving Network Layer Connectivity in Mobile Ad Hoc Networks, Global Journal of Computer Science and Technology, 2010.

XXIX) Dr. P.Subbaiah, Performance Comparison of Congestion Aware Multi-Path Routing (with Load Balancing) and Ordinary DSR, IEEE transactions, 2010.

XXX) Dr. P.Subbaiah, Performance Evaluation of Adaptive Rate Control (ARC) for Burst Traffic over ATM Network, International Journal of Advanced Networking and Applications, 2010.

XXXI) Dr. P.Subbaiah, Performance Comparison and Analysis of DSDV and AODV for MANET, International Journal on Computer Science and Engineering, 2010.

XXXII) Dr. P.Subbaiah, Modified DSR (Preemptive) to reduce link breakage and routing overhead for MANET using Proactive Route Maintenance (PRM), Global Journal of Computer Science and Technology, 2010.

XXXIII) Dr. P.Subbaiah, Modified DSR to reduce link breakage and routing overhead per MANET per preemptive route maintenance, Global Journal of Computer Sciences and Technology, 2010.

XXXIV) Dr. P.Subbaiah, Secured Preemptive DSR – an integration of SRP and SMT with Preemptive DSR for secured route discovery, International Journal on Information Sciences & Computing, 2009.
Conferences / Seminars & Workshops attendedPresented a paper on Application of Evaluation Parameters for Successful Transmission in Wireless Sensor Networks in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II) Presented a paper on A Power Regulation and Harmonic Current Elimination Approach for Parallel Multi-Inverter Supplying IPT Systems in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III) Presented a paper on 2017 Estimation of Surface Roughness with feature Extraction using Evaluable Hardware filter in the proceedings of St.Peter’s University, Chennai,on 3rd and 4th October, 2013.

IV) Presented a paper on Application of Neural Network For Estimation of Surface Roughness Using Discrete Wavelet Transform in the proceedings of International Conference on Education & Educational Research (EER 2013) Singapore on 11th and 12th August, 2013.

V) Presented a paper on Energy Efficient Routing in Mobile Adhoc Networks Using Aggregate Interface Queue Length and Node Remaining Energy in the proceedings of RTETMSD-2013 organized by MVN UNIVERSITY, 2013.

VI) Presented a paper on Low Overhead Routing Protocol for Mobile Adhoc Networks in the proceedings of NRSS-GCC organized by St.PETER’S UNIVERSITY, 2013.

VII) Presented a paper on Energy Efficient with Throughput Maximization Routing in MANET in the proceedings of FTCC-2013 at Bangkok Thailand, 2013.

VIII) Presented a paper on An Adaptive Low Overhead Routing Scheme with Priority Function for MANETS in the proceedings of ICACT organized by AITS, INDIA, 2013.

IX) Presented a paper on Machine Vision Based On Image Enhancement Using Evolutionary Design In Noise Filter in the proceedings of National Conference on New Avenues in Sensors & Automation (NASA-12)organized by Sathyabama University, Chennai on 15th& 16th March 2012.

X) Presented a paper on Image Enhancement and Surface Roughness with Feature Extraction using DWT.in the proceedings of International conference SEISCON-2011 (IET), 2011.

XI) Presented a paper on Preemptive Dynamic Source Routing protocol mobile Adhoc N/W with Back up root in the proceedings of National Research Scholar’s Seminar on Green Technologies in Communication & Computing,organized by by Board of Research in Nuclear Science (BRNS), 2011.

XII) Presented a paper on Feature Extraction of Image for Surface Classification Using Discrete Wavelet Transform & Dual Tree Complex Wavelet Transform in the proceedings of Second National Conference on Communication, Computation, Control & Automation organized by Sri Ramakrishna Institute Of Technology Coimbatore, on 23rd& 24th April 2010.

XIII) Presented a paper on Spain titled Design of the Fault Tolerance System Using Extrinsic Evolvable Hardware in the proceedings ECT Conference, October 2006.

XIV) Presented a paper on Secured preemptive DSR An interpretation of SRP and SMT with primitive DSR for secured root discovery in the proceedings of Design of Fault Tolerance System UsingEvolvable Hardware organized by CBI conference Honolulu, USA on March, 2006.

XV) Presented a paper on Preemptive Dynamic Source Routing protocol for Wireless Adhoc Network in the proceedings of International Conference at VRSCE, Vijayawada.

XVI) Presented a paper on Load balancing energy management scheme for preemptive DSR to increase pocket delivery ratio and decrease delay in the proceedings of IEEE National conference at AVIT, Tamilnadu.

XVII) Presented a paper on Security Issues pertaining to MANET in the proceedings of organized by SVU, Tirupathi.

XVIII) Presented a paper on Data Management in MANET in the proceedings of National conference organized by VCET, Erode, TN.
Dr.B.C.PREMKUMAR, Professor
 PREMKUMAR_ECE
Faculty name Dr.B.C.PREMKUMAR
Qualification Ph. D.
Teaching Experience 23 years
E-mail Id pramukhatech15@gmail.com
Area ofSpecialization Embedded systems
Education InformationI) Ph. D. (ECE) from Dr. MGR Educational & Research Institute, Chennai in 2017.

II) M. Tech (Power Electronics) from University of Visvesvaraya College Engineering, Bangalore in 2007.

III) B. Tech (ECE) from Adichunchanagiri Institute of Technology, Mysore in 1995.
Subjects Handled I) Electronic devices and circuits

II) RF and Microwave Engineering

III) Signals and system

IV) Embedded systems

V) Digital system and design

VI) Linear Integrated Circuits

VII) Electromagnetic field

VIII) Communication Systems

IX) Transmission line and wave guide

X) Measurement & Instrumentation

XI) Digital Image Processing

XII) Wireless Communication

XIII) Antenna and wave propagation

XIV) Medical electronics

XV) Artificial intelligence


Papers published I) Dr. B. C. Prem kumar, A Power Regulation and Harmonic Current Elimination Approach for Parallel Multi-Inverter Supplying IPT Systems, IJRTER, December 2017.

II) Dr. B. C. Prem kumar, Forked Embedded System Models for Automotive Airbag Control System, IJAER - Scopus Indexed Journal, 2015.

III) Dr. B. C. Prem kumar, Performance Improvement in Nonlinear Control System Using RTOS, IJAER - Scopus Indexed Journal, 2015.

IV) Dr. B. C. Prem kumar, Image based Heart Murmur classification using Hamming distance measure, IJAER - Scopus Indexed Journal, 2015.

V) Dr. B. C. Prem kumar, Augmented Reality based heart murmur classification, IJAER - Scopus Indexed Journal, 2015.

VI) Dr. B. C. Prem kumar, Image Based Heart Murmur Classification Using Acoustic Wave Pattern, IJAER - Scopus Indexed Journal, 2015.

Conferences / Seminars & Workshops attendedI) Presented a paper on A Power Regulation and Harmonic Current Elimination Approach for Parallel Multi-Inverter Supplying IPT Systems in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II) Three day National Seminar Kaushala – 2017 Skill Development Systems for Workforce, Engineers and Managers at Alva’s Institute of Engineering and Technology, Mangaluru from 20th to 22nd April, 2017.

III) One day Best Practice Symposium A Power Regulation and Harmonic Current Elimination Approach for Parallel Multi-Inverter Supplying IPT Systems at GSSSIETW, Mysuru on 21st January, 2017.

IV) Presented a paper on Detection of Heart Abnormality Using Image Based Heart Sound Signal With Augmented Reality in an international conference ICAMT-2016 organized by DIET- Vishakapatnam on 27th and 28th December,2016.

V) Three day National Workshop Polymer Nanocomosites for EEE Applications at SIT, Tumakuru from 24th to 26th October, 2016.

VI) Three day workshop Research Methodology and Research Motivational Aspects at GSSSIETW, Mysuru from 27th to 29th July, 2016.

VII) One week FDP Research Opportunity in SIP at JIT, Bangalore from 18th to 23rd January, 2016.

VIII) Two day Faculty Effectiveness Enhancement Training at Suprajiv Training and Development Centre, Bangalore from 25th and 26th November, 2016.

IX) Presented a paper on Design & Implementation of Real Time Vehicle Monitoring & Tracking System on Google Map & an Auto Electronic Mail Alert in an IEEE International conference on Engineering and Technology – ICETECH, organized by Rathinam Technical Campus Institute of Technology, Coimbatore, Tamil Nadu on 20th March 2015.

X) Presented a paper on Design of an Automobile Monitoring System in an national conference on Embedded Systems and Signal Processing – NESP, organized by Jain University, Bangalore on 23rd and 24th January 2014.

XI) Three days National Workshop Research Frontiers in MEMS & NEMS at Jain University, Bangalore on 16th and 18th October 2014.

XII) Three days National Workshop Signal and Image Processing with Applications at RVCE, Bangalore from 1st to 3rd January, 2013.

XIII) One day workshop Research Design and The Nuances of Thesis Writing by Dr. Florian Schweizer at the Second International Conference on Charles Dickens organized by Dr. M. G. R Unviversity, Chennai on 30th March, 2012.

XIV) Two days National Seminar Ramanujan Lecture Series at Jain University, Bangalore from 4th & 5th October, 2012.

XV) One week VTU, VGST FDP Mechatronics and Measurement Systems at CEC, Bangalore from 26th to 30th March, 2012.

XVI) Three day National Seminar and Workshop DIP and Applications at BIT, Bangalore from 1st to 3rd March, 2012.

XVII) One day IET Energy Lecture at TTK Auditorium, Chennai on 27th September, 2012.

XVIII) One day IET pinkerton lecture Connecting Computers with the Human Brain by Prof. KevinWarwick, U.K, 2012.

XIX) One day IET Event Data Center Design & Audit by Matt Flowerday, Founding Director, Capitoline LLP, 2012.

XX) One day IET Energy Lecture at George Tom, UK, 2012.

XXI) One day IET Wheatstine Lecture, 2012.

XXII) One day IET Linkeden lecture series, Bangalore, 2012.

XXIII) One day workshop Recent Trends in WLC at SRSIT, Bangalore from 21st November, 2011.

XXIV) Three days Seminar Aerospace Vehicles at KSIT, Bangalore from 2nd to 4th February, 2011.

XXV) Two days FDP Teaching and Learning Practices, RM & Writing Project Proposals at KSIT, Bangalore from 24th and 25th January, 2011.


Memberships I) M.I.E.T

II) M.I.S.T.E

III) I.I.E.M

IV) M.C.E.G.R


II) Indian Society for Technical Education (M.I.S.T.E), New Delhi.

III) International Institute of Education & Management (IIEM), New Delhi.

IV) Center for Education Growth and Research(MCEGR), New Delhi

Professional Achievements I) BEST EDUCATIONIST AWARD
International Institute of Education & Management, New Delhi, August – 2014.

II) GOLDEN EDUCATIONIST OF INDIA AWARD
Elected as Section Managing Committee Member (SMC) - ISTE, for the term 2015 to 2019, Karnataka section, New Delhi, India.

Awards received I) BEST EDUCATIONIST AWARD by International Institute of Education & Management, New Delhi, August – 2014.

II) GOLDEN EDUCATIONIST OF INDIA AWARD by International Institute of Education & Management, New Delhi, October – 2014.

III) GLORY OF EDUCATION EXCELLENCE AWARD by National & International Compendium, New Delhi, March-2015, for Outstanding Achievements in the field of Education.

Dr. A. RAJAN, Professor
 ECE_RAJAN
QualificationPh.D
Email Idarurajan79@gmail.com
Experience17 years
Education InformationPh. D. (ECE) from St. Peter’s university in 2016.

II) M. Tech (VLSI Design) from SRM University in 2008.

III) B. Tech (ECE) from G.K.M Engineering College, Madras in 2001.

IV) D.E.C.E (ECE) from Valliammai Polytechnic, Tamilnadu in 1998.
Area of SpecializationVLSI Design
Subjects Handled

I) RF and Microwave Engineering

II) Circuit theory

III) Electron devices

IV) Electronic Circuits

V) Signals and system

VI) Digital system and design

VII) Linear Integrated Circuits

VIII) Electromagnetic field

IX) Digital signal processing

X) Communication Systems

XI) Transmission line and wave guide

XII) Digital communication

XIII) Control Systems

XIV) Measurement & Instrumentation

XV) Digital Image Processing

XVI) Wireless Communication

XVII) Antenna and wave propagation

XVIII) Medical electronics

XIX) Advance Digital signal processing

XX) Neural Networks and fuzzy logic

XXI) Digital control system

XXII) Artificial intelligence

Papers Published

I) Rajan. A, comparative study of Glaucomatous image classification using optical coherence Tomography, IJPSRR, 2016.

II) Rajan. A, Glaucoma Detection in Optical Coherence Tomography Images Using Undecimated Wavelet Transform, Research Journal of pharmaceutical, biological and Chemical Sciences, 2016.

III) Rajan. A, Automated Early Detection of Glaucoma in Wavelet Domain Using Optical Coherence Tomography Images, Biomedical & Pharmocology Journal, 2015.

IV) Rajan. A, Glaucomatous image Classification Based on PCA using optical coherence Tomography Image, IJAER, 2015.

V) Rajan. A, Anterior Chamber Angle Measurement Using Oct Image, IJAER, Volume 10 Issue 17 2015.

VI) Rajan. A, Segmentation and Classification of Gallstone in Ultrasound Images of Gall Bladder, IJAER, 2015.

VII) Rajan. A, Glaucomatous image Classification using Wavelet Transform, IEEE international conference on Advance Communication Control and Computing Technologies, 2014.

VIII) Rajan. A, SRAM based Random numbers Generator for non-repeating pattern generation. Applied mechanics and materials, 2014.

IX) Rajan. A, RF Energy Harvesting systems for low power application, IJTES, 2013.

Conferences / Seminars & Workshops attended

I) Presented a paper on Anterior Chamber Angle Measurement Using OCT in an International conference Green Technologies in Power Generation, Communication Instrumentation - ICGPC, 2015.

II) Presented a paper on An ensemble classification based approach applied to retinal blood vessel segmentation in the proceedings of national conference Recent Trends in Electronics and Communication Engineering – NCRTEECE, 2015.

III) Presented a paper in an International conference on Green Technologies for power generation, communication - ICGPC at St. Peter’s University, 2015.

IV) Presented a paper on Glaucomatous image classification using wavelet transform in an IEEE International conference advanced communication control and computing technologies (ICACCCT), 2014.

V) Presented a paper on Design and enhancement of Gain in S-Band ranges using microstrip patch antenna in an International conference - ICOAC, 2014.

VI) Presented a paper on Microstrip Antenna Designs for EF Energy Harvesting in an IEEE International conference, 2014.

VII) Presented a paper in an International conference on Advanced computing - ICOAC at Anna University, MIET Campus, 2014.

VIII) Presented a paper in an International conference on Green Technologies for power generation, communication - ICGPC at St. Peter’s University, 2014.

IX) One day National Workshop Microstrip patch Antenna Design using IE3D in the month of January, 2014.

X) Faculty Quality improvement programme at Shri Andal Alagar College of Engineering on Nov 2014.

XI) Presented a paper on A flash-Trie Architecture lookup for IP V6 Protocol in the proceedings of national conference Advances in Information and Communication Technology – NCAEEE, 2013.

XII) Presented a paper on Design and Implementation of Viterbi Decoding using FSM in the proceedings of national conference Networking communication system and Signal processing - NCSSP-2013.

XIII) One day National Workshop on Measurements Basics & RF Basics in the month of July, 2013.

XIV) Two days National workshop on Applications of signal and image processing at Sri Venkateswara College of Engineering, Chennai on 11th and 12th December 2013.

XV) Presented a paper on local variation and Edge weighted censorial voroconi tesselletion model for segmentation in an International conference – ICFTEE, 2012.

XVI) Presented a paper in an International conference on Futuristic trends in Electronics Engineering - ICFTEE at Thiruvalluvar Engineering College, 2012.

XVII) One week FDP on Communication Theory at Anna University from 10th to 16th December, 2012.

XVIII) Presented a paper in an IEEE International conference on Communication and Signal Processing at Athiparasakthi Engineering college.

XIX) Seminar (AICTE – ISTE sponsored Programme) on Erode in the field of Neuro Fuzzy Based Industrial Automation at Kongu Engineering College.

XX) Three day workshop on Real Time Based DSP & Embedded Application at Easwari Engineering College, Chennai.

XXI) Seminar on Computer Networks Practice at Anna University, Chennai.

XXII) Seminar on design trends in deep submicron CMOS VLSI at Anna University.

XXIII) Seminar on Emerging Trends In VLSI AND ASIC at Anna University Chennai.

XXIV) Two Weeks faculty development program on Mechatronics at Anna University, MIT Campus.

XXV) National Workshop on DSPIC at SSN College of Engineering.

XXVI) One day National workshop on Technology enhanced learning at AMET university,Chennai.

Awards Won

I)Best Result Awarded for the subject, Advanced Digital Image processing.

II)Best Result Awarded for the subject Satelite communication.

Projects Guided:B. Tech - 100
Mr P.S. Sreenivas Reddy, Associate Professor
Mr P.S. Sreenivas Reddy, Associate Professor
QualificationM.E (Ph. D)
Email Idsrinivasareddy.ps@nnrg.edu.in
Experience16 Years
Education Information:Pursuing Ph. D. (ECE) from Jadavpur University, Kolkata.

II) M. E (Applied Electronics) from Madras University, Chennai in 2000.

III) B. E (ECE) from Madras University, Chennai in 1998.
Area of SpecializationVLSI and Communiactions.
Subjects HandledI) Electronic devices and circuits

II) Very Large Scale Integrated Circuits

III) Signals and system

IV) Microprocessor and Microcontroller

V) Digital system and design

VI) Linear Integrated Circuits

VII) Electromagnetic field

VIII) Communication Systems

IX) Transmission line and wave guide

X) Measurement & Instrumentation

XI) Digital Image Processing

XII) Wireless Communication
Papers PublishedI) Mr. P. S. Sreenivasa Reddy, Design Of Printed Transducers For Organic Coating Of Metallic Substrates Using Capacitive Touch Sensors, IJRTER, December 2017.

II) Mr. P. S. Sreenivasa Reddy, Asymmetric Mach–Zehnder Interferometer, IJRTER, December 2017.

III) Mr. P. S. Sreenivasa Reddy, Design Of Novel Binary Code Encoder Based On Multiplexer For 4 Bit Flash ADC, IJRTER, December 2017.

IV) Mr. P. S. Sreenivasa Reddy, Design and Development of ARM7 Based Real-Time Industry Automation System using Sensors & GSM, Austin Journal of Robotics & Automation, 2017.

V) Mr. P. S. Sreenivasa Reddy, Synthesis of high K films using Zr doped TiO2 by Sol-gel method suitable for ultra thin MOS devices, International Journal of Applied Engineering Research, 2015.

VI) Mr. P. S. Sreenivasa Reddy, Design and Implementation of different Multipliers with minimal leakage power, International Journal of Applied Science, 2013.
Conferences / Seminars & Workshops attendedPresented a paper on Design Of Printed Transducers For Organic Coating Of Metallic Substrates Using Capacitive Touch Sensors in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II) Presented a paper on Asymmetric Mach–Zehnder Interferometer in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III) Presented a paper on Design Of Novel Binary Code Encoder Based On Multiplexer For 4 Bit Flash ADC in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

IV) Five days workshop on Intellectual Property Rights & Innovations at NNRESGI Hyderabad from 27th Nov to 2nd December, 2017.

V) Presented a paper on Design of Level Shifter to Enhance the Performance Suitable for Low Power Application in the proceedings of International Conference on Electrical, Electronics, Communication, Computer Technologies and Optimization Techniques in 2017.

VI) Five day National Workshop on Multidisciplinary application is using LABVIEW at Nalla Narasimha Reddy group of Institutions, Hyderabad, from 20th to 25th March, 2017.

VII) Three days workshop on Faculty Enablement Programme at TASK& Infosys, Hyderabad from 27th to 29th Sep, 2016.

VIII) Three days workshop on Analog & Digital System using Cadence EDA Tool at Nalla Narasimha Reddy group of Institutions, Hyderabad from 3rd to 5th Feb, 2016.

IX) Five days workshop on Microcontrollers –Programming & Applications at Advanced Training Institute for Electronics and process instrumentation from 23th to 27th Nov,2015.

X) Presented a paper on Intelligent Approach for Power System PMU Placement in the proceedings of IEEE POWERCON 2008, India organized on October, 2015.

XI) Two days on Simulation Using Proteus & Keil µ Vision at Nalla Narasimha Reddy group of Institutions, Hyderabad Centre, Bangalore from 17th and 18th April, 2015.

XII) Two days on PCB Design & Fabrication at Nalla Narasimha Reddy group of Institutions, Hyderabad Centre, Bangalore from 25th and 26th July, 2014.

XIII) Two days workshop on Advances in Image Processing and Applications at BITS, Pilani, Hyderabad from 26th to 27th October, 2013.

XIV) Presented a paper on Indium Doped Titanium Dioxide: A High Mobility and Low K-Nanostructured Semiconductor in the proceedings of International Conference on Sustainable Energy and Intelligence System organized by KCG College of Technology, 2013.

XV) Five days Workshop on Leadership Training at Venkat‘s Institute of skills training, Hyderabad, from 13th to 18th July, 2010.

XVI) Presented a paper on Power System PMU Placement a Comparative Survey Report in the proceedings of IET Conference ICTES 2007 at Chennai on 20-22 Dec, 2007.

XVII) Presented a paper on VLSI Design and implementation of INTEL 8253 IC using VHDL in the proceedings of IET Conference ICTES 2007 at Chennai on 20-22 Dec, 2007.

XVIII) Two days workshop on Smart Grids and Distribution Networks at Dr M.G.R University, Chennai from 29th to 30th December, 2009.

XIX) Twenty days workshop on Refresher course on VLSI design at UGC-Academic staff college JNTU, Hyderabad from 13th November to 03rd December, 2002.

XX) Three days workshop on Embedded systems at SASTRA University, Thanjavur from 12th to 14th September, 2002.

XXI) Two days workshop on Teaching Competency at Technical Teacher Training Institute, Chennai from 23rd and 24th February, 2002.
MembershipsI) M.I.E.T.E

II) M.I.S.T.E
Ms. Kothur Roopa, Associate Professor
Photo
QualificationM.Tech
E-mail Idrupakothur@gmail.com
Teaching Experience 8 Years
Education InfromationI) M.Tech VLSI pass out from JBIET in 2011

II) B.Tech ECE pass out from Padmasri Dr.B.V.Raju Institute of Technology in 2006
Area of SpecializationVLSI & Embedded Systems
Subjects handled I) Electronic devices and circuits

II) Switching theory and logic design

III) Digital Design Through Verilog

IV) Analog communications

V) Digital Communications

VI) Controls systems

VII) Microprocessor and Microcontroller

VIII) Embedded Systems

IX) Wireless communication network

X) Cellular mobile communication
Projects GuidedB. Tech – 16

II) M. Tech – 2
Mr B.Chandrashaker Reddy, Associate Professor
Mr BIJJULA CHANDRASHEKAR REDDY Asst
QualificationM.Tech
E-mail Idchandrashakerreddy.b@nnrg.edu.in
Teaching Experience 6 Years 6 Months
Education InfromationI) M. Tech (Digital Systems and Signal Processing) from GITAM University, in 2011.

II) AMIETE from IETE New Delhi, in 2009.
Area of SpecializationDigital Systems and Signal Processing
Subjects handled I) Signals And Systems

II) Digital Signal Processing

III) Digital Image Processing

IV) Analog Communications

V) Pulse And Digital Circuits

VI) Embedded Systems

VII) Controls Systems

VIII) Signals and Stochastic Process

IX) Intellectual Property Rights

X) CMOS Digital Integrated Circuits

XI) Advanced Operating Systems
Papers PublishedI) B. Chandrashaker Reddy, A Survey on Natured Inspired Algorithms for Detecting Brain Tumor from MR Image, IJRTER, December 2017.

II) B. Chandrashaker Reddy, A Unique Watermarking Technique using Even Odd Concept in Grayscale Image Considering RGB Values , IJEECS, November 2017.

III) B. Chandrashaker Reddy, Shape Recognition Using Artificial Bee Colony Optimization, IJAERD, April 2017.

IV) B. Chandrashaker Reddy, Contour Correspondence Using Ant Colony Optimization, IJAERD, March 2017.


V) B. Chandrashaker Reddy, Analysis of Adaptive Filter Algorithms Approach For Speech Enhancement Using Simulink, IJAERD, March 2017.

VI) B. Chandrashaker Reddy, Correlation of GA and PSO for Analysis of Efficient Optimization, IJAERD, March 2017.

VII) B. Chandrashaker Reddy, Implementation of Automatic Piano Player Using MATLAB Graphical User Interface, IJAERD, March 2017.

VIII) B. Chandrashaker Reddy, Implementation of Real Time Motion Feature Extraction of a Video Sequence on FPGA, IJVLSISDCS, May 2016.
Conferences / Seminars & Workshops attendedI) Presented a paper on A Survey on Natured Inspired Algorithms for Detecting Brain Tumor from MR Image in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II) Ten days workshop on Intelligent Signal Processing and Control System Design using Bio Inspired Algorithms at NIT Warangal from 22nd to 31st May 2017.

III) One Week workshop on Advanced Signal Processing at NIT Warangal from 22nd to 28th February 2016.
Projects Guided

I) B.Tech-20

II) M.Tech-3
MembershipsI)MIETE
Ms. Gurram Umadevi, Associate Professor
Mrs. GURRAM UMA DEVI. Asst
QualificationM.Tech
E-mail Idumadevi.g@nnrg.edu.in
Teaching Experience 9.5 years
Education InfromationI) M.Tech DECS pass out from Gurunanak Engineering college Ibrahimpatnam, (JNTUH)

II) 2.B. Tech (ECE) from SRTIST, Nalgonda in 2006
Area of SpecializationVLSI and Embedded Systems
Subjects handled I) Basic Electrical and Electronics Engineering

II) Microprocessors & Interfacing

III) Switching Theory and Logic Design

IV) Pulse & Digital Circuits

V) Microcontrollers& Applications

VI) IC applications

VII) Electronic devices & circuits

VIII) VLSI design

IX) CMOS Analog integrated circuit design

X) Electronic Measurements & Instrumentation

XI) Low power VLSI Design
Papers PublishedI) G. Umadevi, An embedded system for Video Codec using H.264, IJRTER, December 2017.

II) G. Umadevi, Low Power Gilbert Mixer Performance & a study onnoise parameters for UWB frequencies, IJRTER, December 2017.

III) G. Umadevi, Area and Power efficient design of edge triggered D-Flipflop using GDI Technique, IJRTER, December 2017.
Conferences / Seminars & Workshops attendedI) Presented a paper on An embedded system for Video Codec using H.264 in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II) Presented a paper on Low Power Gilbert Mixer Performance & a study onnoise parameters for UWB frequencies in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III) Presented a paper on Area and Power efficient design of edge triggered D-Flipflop using GDI Technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

IV) Presented a paper on Characterization of Gilbert Cell Mixer for Ultra-Wideband Applications and noise parameters in an international conference ICEECCOT-2017 organized by GSSS Institute of Engineering and Technology for Women - Karnataka on 15th and 16th December,2017.

V) Presented a paper on Designing a level shifter to enhance the performancesuitable for low power applications in an international conference ICEECCOT-2017 organized by GSSS Institute of Engineering and Technology for Women - Karnataka on 15th and 16th December,2017.

VI) One week workshop on Digital and Analog VLSI Design using CADENCE Tools at CVR College of engineering, Hyderabad from 5th to 10th June, 2017.

VII) Presented a paper on A Low Voltage Low Power Four Quadrant Analog Multiplier using Submicron Technology in an IEEE conference organized by SV College of Engg, Bangalore in March 2017.

VIII) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

IX) One week workshop on 8051 Microcontrollers - Programming & Applications by ATI – Ramanthapur, Hyderabad from 16th November to 21st November, 2015.
Projects GuidedB. Tech – 10

II) M. Tech - 2
MembershipI) MIETE

II) MISTE
Mr. Srinivasa Rao Seelam, Associate Professor
5-S Srinivas Rao
QualificationM.Tech
E-mail Idsrinivasarao.s@nnrg.edu.in
Teaching Experience 10 years
Education Infromation

Pursuing Ph.D. (Wireless Sensor Networks) from JNTU, Hyderabad

II) M. Tech (ECE) from MITS, Kodad in 2010.

III) B. Tech (ECE) from SSIT, Khammam in 2007.
Area of SpecializationEmbedded Systems
Subjects handled I) Microprocessors and Microcontrollers

II) Embedded Systems

III) Analog Communications

IV) Digital Communications

V) Switching Theory and Logic Design

VI) VLSI Design

VII) Advanced Data Communication

VIII) Computer Networks

IX) Electronics Devices and Circuits

X) Electronic Circuit Analysis

XI) Computer Organization and Operating Systems

XII) Control Systems

XIII) Linear digital Integrated Circuits

XIV) Real Time Operating systems

XV) Microcontroller Applications
Papers PublishedI) S. Sriniavasa Rao, Energy Consumption Model For Internet Connectivity In Mobile Ad-Hoc Networks, IJRTER, December 2017.

II) S. Sriniavasa Rao, Application of Evaluation Parameters for Successful Transmission in Wireless Sensor Network, IJRTER, December 2017.

III) S. Sriniavasa Rao, Design of Reconfigurable Pseudorandom Test Pattern Generator for BSIT, IJRTER, December 2017.

IV) S. Sriniavasa Rao, An Energy Efficient Routing Protocol for Wireless Sensor Networks using A-star Algorithm (EEE), IJRTER, December 2017.

V) S. Sriniavasa Rao, Investigation of LEACH Protocol and HIERARCHICAL Routing Protocols Based On Clustering in WSN (EEE), IJRTER, December 2017.
Conferences / Seminars & Workshops attended

Presented a paper on Energy Consumption Model For Internet Connectivity In Mobile Ad-Hoc Networks in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II) Presented a paper on Application of Evaluation Parameters for Successful Transmission in Wireless Sensor Network in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III) Presented a paper on Design of Reconfigurable Pseudorandom Test Pattern Generator for BSIT in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

IV) Presented a paper on An Energy Efficient Routing Protocol for Wireless Sensor Networks using A-star Algorithm (EEE) in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

V) Presented a paper on Investigation of LEACH Protocol and HIERARCHICAL Routing Protocols Based On Clustering in WSN (EEE) in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

VI) Presented a paper on An energy efficient improved RPL routing protocol in an international conference Intelligent Computing And Control(I2C2) organized by Karpagam College Of Engineering, Coimbatore on 23rd March, 2017.

VII) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.
Projects GuidedI) B.Tech-30

II) M.Tech- 10
MembershipI) MISTE
Ms.Indira Priyadarshini Gera, Associate Professor
2-G Indira Priyadarshini
QualificationM.Tech
E-mail Idindirapriyadarshini.g@nnrg.edu.in
Teaching Experience 12 Years
Education InfromationI) M. Tech (Systems and signal processing) from JNTUH College of Engineering in 2011.

II) B. Tech (ECE) from BRECW, Hyderabad in 2004.

III) Diploma (ECE) from GPTC, Hyderabad in 2001.
Area of SpecializationData Communications
Subjects handled I) Switching Theory and Logic Devices

II) Antennas and Wave Propagation

III) Electronic Devices and Circuits

IV) Digital Signal Processing

V) Linear and Digital Integrated Circuits

VI) Computer Organization

VII) Optical Communication

VIII) Microprocessor and Microcontroller

IX) Electronic Measurement and Instrumentation

X) Radar Systems

XI) Computer Networks

XII) TV Engineering
Papers PublishedI) G. Indira Priyadarshini, ADS-B is Vulnerable to Location Spoofing Attacks and Countermeasure, IJRTER, December 2017.

II) G. Indira Priyadarshini, Low-Power Programmable Pseudorandom Test Pattern Generators with Test Compression Capabilities, IJRTER, December 2017.

III) G. Indira Priyadarshini, Binary Adder Using More Efficient Area and Time Optimized Quantum-Dot Cellular Automata, IJEDR, September 2017.

IV) G. Indira Priyadarshini, Better Efficiency Curve-let Based Image Fusion, IJIRSET, September 2017.

V) G. Indira Priyadarshini, An Intelligent Suspicious Activity Detection Framework (ISADF) for Video Surveillance Systems, IJCA, December 2013.
Conferences / Seminars & Workshops attendedI) Presented a paper on ADS-B is Vulnerable to Location Spoofing Attacks and Countermeasure in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II) Presented a paper on Low-Power Programmable Pseudorandom Test Pattern Generators with Test Compression Capabilities in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III) Presented a paper on Multilateration with ADS-B a boon in Civil Aviation Application in an international conference ICEECCOT-2017 organized by GSSS Institute of Engineering and Technology for Women - Karnataka on 15th and 16th December,2017.

IV) Presented a paper on Intelligent Security System for Residential and Industrial Automation in an IEEE International conference UPCON organized by Banaras Hindu University - Varanasi on 9th to 11th December,2016.

V) One week workshop on Fundaments of Signals, Systems and Random Variables with Hands-on session using MATLAB at Geethanjali College of Engineering and Technology, Hyderabad from 5th to 10th June, 2017.

VI) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

VII) One week workshop on LABVIEW Based System Design for Multi Disciplinary Research Application at CVR College of engineering, Hyderabad from 21st to 25th November, 2016.

VIII) One week workshop on 8051 Microcontrollers - Programming & Applications by ATI – Ramanthapur, Hyderabad from 16th November to 21st November, 2015.
Projects GuidedB. Tech – 20
Memberships:1.Annual Member-IEEE
Any Industry ExperienceTechnical Assistant at Kaivalle electronics, Hyderabad from June 2004 to May 2005.
Mr. Aare Gopal, Associate Professor
Mr AARE GOPAL Assoc Prof
QualificationM.Tech
E-mail Idgopal.a@nnrg.edu.in
Teaching Experience 11.6 years
Education InfromationI) M. Tech (Systems and signal processing) from JNTUH College of Engineering in 2011.

II) B. Tech (ECE) from Vijay Rural Engineering College, Nizamabad in 2003.
Area of SpecializationSystems and Signal Processing
Subjects handled I) Electromagnetic Theory and Transmission Lines

II) Antennas and Wave Propagation

III) Microwave Engineering

IV) Electronic Devices and Circuits

V) Electronic Circuit Analysis

VI) Digital Signal Processing

VII) Digital Image Processing

VIII) Linear and Digital Integrated Circuits

IX) Pulse and Digital Circuits

X) Radar Systems
Papers Published

A. Gopal, A Survey On Energy Efficient Base Station Sleeping Techniques In Green Communications, IJRTER, December 2017.

II) A. Gopal, Energy Saving Transmission for LTE Base station Based on optimized rate and power control, IJR, December 2017.

III) A. Gopal, Comparative Analysis of 11T and 16T and 28T Full adder based 4*4 Wallace Tree Multiplier using Cadence 180nm Technology, IRJET, August 2017.
Conferences / Seminars & Workshops attendedI) Presented a paper on A Survey On Energy Efficient Base Station Sleeping Techniques In Green Communications in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II) One week workshop on 5G Wireless Communications from 18th to 23rd December 2017, organized by NIT Warangal and JNTUH Hyderabad.

III) One week workshop on 8051 Microcontrollers - Programming & Applications by ATI – Ramanthapur, Hyderabad from 30th November to 4th December, 2015.

IV) Three days workshop on EMTL from 2nd to 4th March 2015, organized by JNTU Jagtial.

V) Ten days workshop on Signals and Systems from 2nd to 12th Jan 2014, organized by IIT Khargpur and IIT Bombay, in Turbomachinery Institute of Technology and Sciences, Hyderabad.

VI) Three days workshop on FPGA Based Embedded System Design from 5th to 7th December 2013, in Turbomachinery Institute of Technology and Sciences, Hyderabad.

VII) One week workshop on High Impact Teaching Skills from 27th to 31st December 2011, in MLR Institute of Technology, Dundigal.
Projects GuidedB. Tech - 20
Mr.Devendar Reddy Y, Associate Professor
3-Y Devender reddy
QualificationM.Tech
E-mail Iddevendarreddy.y@nnrg.edu.in
Teaching Experience 10 Years
Education InfromationI) M. Tech (Digital Systems and Computer Electronics) from Malla Reddy Engineering College, Hyderabad in 2012.

II) B. Tech (ECE) from HRD Engineering College, Devarakonda in 2005.
Area of SpecializationDigital Systems and Computer Electronics
Subjects handled Electronic Devices and Circuits

II) Network Theory

III) Signals& Systems

IV) Electronic Circuit Analysis

V) Switching Theory &Logic design

VI) Electric Circuits

VII) Digital Signal Processing

VIII) Pulse and Digital Circuits

IX) Electronic Circuits

X) Full Custom Design

XI) Digital System Design

XII) CMOS Mixed Signal Design

XIII) Transducers in Instrumentation
Papers Published
I) Y. Devender Reddy, Implementation of Multi Format Codec using ARM11 MP Core Processor, IJRTER, December 2017.

II) Y. Devender Reddy, Design of Low Power and High Speed 4-Bit Ripple Carry Adder Using area efficient full adder cell in 180nm CMOS Process Technology, IJRTER, December 2017.

III) Y. Devender Reddy, Implementation of ROBA Multiplier using Approximate Multiplier for High-Speed & Energy-Efficient DSP Applications, IJITECH, August 2017.

IV) Y. Devender Reddy, Design of Secure Underground Coal Mines Using Innovative Wireless Sensor Network, IJOEEET, 2015.
Conferences / Seminars & Workshops attended

Presented a paper on Implementation of Multi Format Codec using ARM11 MP Core Processor in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II) Presented a paper on Design of Low Power and High Speed 4-Bit Ripple Carry Adder Using area efficient full adder cell in 180nm CMOS Process Technology in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III) One week workshop on Fundaments of Signals, Systems and Random Variables with Hands-on session using MATLAB at Geethanjali College of Engineering and Technology, Hyderabad from 5th to 10th June, 2017.

IV) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

V) One week workshop on 8051 Microcontrollers - Programming & Applications by ATI – Ramanthapur, Hyderabad from 30th November to 4th December, 2015.

VI) One week workshop on Introduction to Basic Simulation at CMR Engineering College, Hyderabad from 17th to 21st August, 2009.
Projects GuidedI) B.Tech-25

II) M.Tech-3
Memberships:
I)MIETE
Mrs.BHAKTULA SUNEETHA,Associate Professor
 4-B Suneetha
QualificationM.Tech
Email Idsuneetha.b@nnrg.edu.in
Teaching Experience (in Years)16 years
Education InformationI) M. Tech (Systems and signal processing) from JNTUH College of Engineering in 2011.

II) B. Tech (ECE) from GPREC, Kurnool in 1996.
Area of SpecializationSystems and Signal Processing
Subjects HandledI) Electronic Devices and Circuits

II) Electronic Circuit Analysis

III) Linear and Digital Integrated Circuits

IV) Microwave Engineering

V) VLSI Design

VI) TV Engineer

VII) Microprocessor and Interfacing

VIII) Electronics Measurements and Instrumentation
Papers PublishedI) B. Suneetha, Asymmetric Mach–Zehnder Interferometer, IJRTER, December 2017.

II) B. Suneetha, Design of Printed Transducers for Organic Coating of Metalic Substrates using Capacitive Touch Sensors, IJRTER, December 2017.

III) B. Suneetha, Design of Low Power Full Adder Based Wallace Tree Multiplier Using Cadence 180nm Technology, IJIRSET, Volume 6 Issue 5 May 2017.

IV) B. Suneetha, Intelligent Control System for Power Management in Enclaves/Buildings based on WSN, INPRESSCO, volume 5 issue 4 August 2015.

V) B. Suneetha, Designing an efficient image encryption then compression system, IJIREEICE, volume 3 issue 3 March 2015.

VI) B. Suneetha, Serial front panel data port protocol implementation in Xilinx FPGAs, IJRIT volume 2 issue 10 October 2014.
Conferences / Seminars & Workshops attendedI) Presented a paper on Asymmetric Mach–Zehnder Interferometer in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II) Presented a paper on Design of Printed Transducers for Organic Coating of Metalic Substrates using Capacitive Touch Sensors in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III) One week workshop on Digital and Analog VLSI Design using CADENCE Tools at CVR College of engineering, Hyderabad from 5th to 10th June, 2017.

IV) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

V) One week workshop on Advanced Digital Signal Processing and Applications at Vardhaman College of Engineering under UGC, Hyderabad from 19th to 24th September, 2016.
Projects GuidedB. Tech – 15
MembershipI) MIETE

II) IACSIT

III) MISTE
Any Industry ExperienceTechnical Executive at Software Technology Group, Thirupati from June 1998 to July 2001.
Dr. CH. Venkata Sivaprasad, Assistant Professor
 Dr. CH. Venkata Sivaprasad, Assistant Professor ece
QualificationPh. D.
Email Idvenkatasivaprasad.ch@nnrg.edu.in
Previous working Experience6 months
Education InformationI) Ph. D. (ECE) from Dr. MGR Educational & Research Institute, Chennai in 2017.

II) M. Tech (VLSI Design) from Sathyabama University, Chennai in 2013.

III) B. Tech (ETCE) from Sathyabama University, Chennai in 2011.
Area of SpecializationVLSI Design, Embedded systems, Tele-Communication
Subjects HandledI) Embedded systems

II) VLSI Systems and Design
Funded ProjectsI)Funded by MSME Government of INDIA (INR-7,50,000/-) on SMART – SAFE AND DISABLE FRIENDLY ENERGY SAVING BUILDINGS (A low cost model for future homes) with Incubation Center in Dr.M.G.R. University, Chennai.
BOOKs and NEWs Letters PublishedI)Venkata Siva Prasad, CH, Ravi, S, Published Book of “ENJOYMENT OF PRACTICAL ELECTRONICS (A Lerner for Electronics experiments)” through Dr.M.G.R.University with ISBN- 978-938465414-6.
Papers Published&published:Venkata siva Prasad. CH, Design and Implementation of Scheduler for Virtual File Systems in Shared memory Multi-Core processor Using ARM-FL2440, IJCTA - Scopus Indexed Journal, Volume 9 Issue 10 (H Index -9), 2016.

II) Venkata siva Prasad. CH, Scheduler for shared memory among multiple cores with performance in dynamic allocator using ARM processor, ARPN Journal of Engineering and Applied Sciences - Scopus Indexed Journal, Volume 11 Issue 9 (H Index -15), 2016.

III) Venkata siva Prasad. CH, Implementation of Montgomery Modular Multiplication Algorithm for Multi-Core Systems, IJCTA - Scopus Indexed Journal, Volume 9 Issue 4 (H Index -9), 2016.

IV) Venkata siva Prasad. CH, Multi-Core Processor Based TCP/IP Client and Server Module Using Open MP, IJAER - Scopus Indexed Journal, Volume 10 (H Index -13), 2015.

V) Venkata siva Prasad. CH, Performance Improvement in Data Searching and Sorting Using Multi-Core, ARPN Journal of Engineering and Applied Sciences - Scopus Indexed Journal, Volume 10 Issue 16 (H Index -15), 2015.
International Conferences I) Presented a paper on Performance of Shared Virtual Memory for Multi-Core Processor Using Gizmo Board in the international conference and for publication in Springer Advances in Intelligent Systems and Computing Series.

II) Presented a paper on Design and Implementation of Scheduler for Virtual File Systems in Shared memory Multi-Core processor Using ARM-FL2440 in the 3rd International Conference on Digital Policy & Management, Nikko Saigon, Hochiminh, Vietnam.

III) Presented a paper on Performance of Shared Virtual Memory in Multi-core Processor Using Scheduler in the International Conference on Recent Advance in Applied Science – 2016, organized by ISPA and St.PETER’S UNIVERSITY, Chennai, Tamilnadu, from 11th to 13th February 2016.

IV) Presented a paper on Multi-Core processor for Montgomery Modular Multiplication of Carry Save Adder in the International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT) organized by DMI College of engineering, Chennai, Tamilnadu, from 3rd to 5th march 2016.

V) Presented a paper on A Fast Information Dissemination System for Emergency Services over Vehicular Ad Hoc Networks in the International Conference on Energy, Communication, Data Analytics and Soft Computing) , organized by IEEE Madras Section.

VI) Presented a paper on Sensor and Vision Based Autonomous AGRIBOT for Sowing Seeds in the International Conference on Energy, Communication, Data Analytics and Soft Computing (ICECDS), organized by IEEE Madras section, Chennai.

VII) Presented a paper on Opportunistic Spectrum Distribution Protocol for Wireless Sensor Networks in the International Conference on Electrical, Electronics, Computers, Communication, Mechanical and Computing (EECCMC), organized by IEEE Madras section, Vellore.
Seminars/ Workshop/Staff Development Programs Attended I) Acted as IEEE sponsored Session chair in an International Conference on Energy, Communication, Data Analytics and Soft Computing (ICECDS), organized by IEEE Madras section, Chennai, Tamilnadu. ISBN: XPLORE COMPLIANT - 978-1-5386-1887-5.

II) Participated in Four Days FDP on “VLSI Testing” Organized by QMAX Test Technologies, Dr.M.G.R.University, Chennai.

III) Participated in Seven Days FDP on “VLSI Design” Organized by UGC - Anna University, Chennai.

IV) Participated Two Days Workshop on “MEMS and its Simulation (Comsol Tool)” at Dr .M.G.R Education and Research Institute University, Chennai,T.N.

V) Participated in Four Days Workshop on “Internet Of Thing (IoT)” organized by Department of ECE, INTEL-FICE, Dr.M.G.R.University, Chennai.

VI) Participated in ONE Day Workshop on “Wireless Sensor Networks and its use in IoT” Organized by Department of ECE, ANNA University, Chennai.

VII) Participated in ONE Day International Technical Seminar on “The State of the Art of Neurodynamic Optimization” organized by IEEE Computational Intelligence Society.

VIII) Participated in ONE Day Workshop on “Scientific Writing Made Easy Thesis” organized by Department Of R & D ,Dr.M.G.R.University, Chennai.
MembershipsI) I.E.E.E
Ms. Sneha Talari, Assistant Professor
Mrs. SNEHA TALARI. Asst
QualificationM.Tech
E-mail Idsneha.t@nnrg.edu.in
Teaching Experience 6 years
Education InfromationI) M.Tech (Microwave and Radar Enginnering) pass out from Osmania University Hyderabad in 2011

II) B.Tech ECE Pass out from Karshak Engineering College, Uppal in 2009
Area of SpecializationMicrowave and Radar Engineering
Subjects handled I) Microwave Engineering

II) Radar Engineering

III) Analog Communication

IV) Digital Communication

V) Electromagnetic Theory and Transmission Lines

VI) Antenna Wave Propagation

VII) Advanced Data Communication
Papers Published
I) Sneha Talari, DODAG Topology based Evaluation of IRPL, IJRTER, December 2017.

II) Sneha Talari, High speed Single Symbol Error Correction Codes Based on Reed Solomon Codes using verilog, IJRTER, December 2017.

III) Sneha Talari, Improved Security In Automated Teller Machine, IJRTER, December 2017.

IV) Sneha Talari, Hardware Based Implementation and Detection of Glaucoma, IJRTER, December 2017.

V) Sneha Talari, Design and Analysis of Rectangular Patch antenna with different substrates, IJAERE, Volume 4 Issue 4 April 2017.

VI) Sneha Talari, Tapered Spiral Helix Antenna, IJETAE, Volume 3 Issue 3 March 2013.
Conferences / Seminars & Workshops attendedI) Presented a paper on DODAG Topology based Evaluation of IRPL in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II) Presented a paper on High speed Single Symbol Error Correction Codes Based on Reed Solomon Codes using verilog in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III) Presented a paper on Improved Security In Automated Teller Machine in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

IV) Presented a paper on Hardware Based Implementation and Detection of Glaucoma in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

V) Presented a paper on Multilateration with ADS-B a Boon in civil Aviation Application in an international conference ICEECCOT-2017 organized by GSSS Institute of Engineering and Technology for Women - Karnataka on 15th and 16th December, 2017.

VI) Presented a paper on Plagiarism: A Serious Ethical Issue Indian Students-Critical Study On Impact Factors in an international conference ISTAS-2016 on 20th to 22nd October,2016.

VII) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

VIII) One week workshop on PIC Microcontrollers by ATI – Ramanthapur, Hyderabad from 23rd to 27th November, 2015.

IX) Two days workshop on PCB Design and Fabrication at NNRESGI, Hyderabad from 6th & 7th September, 2013.
Projects GuidedB. Tech – 8
Memberships:I) MISTE
Mr. Kurmaiah N, Assistant Professor
Mr NAGANULA KURUMAIAH Asst
QualificationM.Tech
E-mail Idkurmaiah.n@nnrg.edu.in
Teaching Experience 5 Years
Education InfromationI) M.Tech VLSI System Design pass out from GokarajuRangaraju Institute Of Technology, Bachupally in 2011

II)B.Tech ECE Mahatma ghandi Institute Of Technology And Science, Gandipet in 2007
Area of SpecializationVLSI System Design
Subjects handled I) VLSI

II) Low Power VLSI

III) Electronics Devices and Circuits

IV) Microprocessors and Microcontrollers

V) Switching Theory and Logic Design

VI) Cellular Mobile Communication

VII) Digital Signal Processing

VIII) Microprocessor and Interfacing Devices
Papers Published

I) N. Kurmaiah, High speed Single Symbol Error Correction Codes Based on Reed Solomon Codes using verilog, IJRTER, December 2017.

II) N. Kurmaiah, DODAG Topology based Evaluation of IRPL, IJRTER, December 2017.

III) N. Kurmaiah, Fingerprint Combination for Privacy Protection, IJCRT, Volume 5 Issue 4 December 2017.

IV) N. Kurmaiah, Design and Implementation of Hybrid Lut/Multiplexer Fpga Logic Architectures, IJR, Volume 4 Issue 17 December 2017.

V) N. Kurmaiah, Audio Watermarking With Emd Technique, IJR, Volume 4 Issue 17 December 2017.

VI) N. Kurmaiah, A new approach for Reduced Design of Secure Differential Logic Gates for DPA Resistant Circuits, IJR, Volume 4 Issue 14 November 2017.

VII) N. Kurmaiah, Design of Test Compression Capabilities based Programmable PRPG with Low Power, IJGSE, Volume 5 Issue 8 August 2017.

VIII) N. Kurmaiah, Random Test Pattern Generator for BIST based Test Applications with Low Power, IJGSE, Volume 5 Issue 8 August 2017.
Conferences / Seminars & Workshops attendedPresented a paper on High speed Single Symbol Error Correction Codes Based on Reed Solomon Codes using verilog in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II) Presented a paper on DODAG Topology based Evaluation of IRPL in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

IV) One week workshop on PIC Microcontrollers by ATI – Ramanthapur, Hyderabad from 23rd to 27th November, 2015.

V) Two days workshop on PCB Design and Fabrication at NNRESGI, Hyderabad from 6th & 7th September, 2013.
Projects GuidedB. Tech – 8
Any Industry ExperienceTrainer at Silicon Systems, Hyderabad from June 2011 to May 2012.
Mr. Madhu Shiramshetty, Assistant Professor
Mr SRIRAM SHETTY MADHU Asst Prof
QualificationM.Tech
E-mail Idmadhu.s@nnrg.edu.in
Teaching Experience 5.5 years
Education InfromationI) M. Tech (Embedded Systems) from CVSR College of Engineering, Jodimatla – Ghatkesar in 2012.

II) B. Tech (ECE) from MITS, Kodad in 2008.
Area of SpecializationEmbedded Systems
Subjects handled I) Electronic devices and circuits

II) Switching theory and logic design

III) Digital Design Through Verilog

IV) Analog communications

V) Digital Communications

VI) Controls systems.

VII) Microprocessor and Microcontroller

VIII) Embedded Systems

IX) Wireless communication network

X) Cellular mobile communication

XI) Real Time Operating System

XII) Microcontroller for Embedded Systems

XIII) Embedded Networks
Papers PublishedS. Madhu, Implementation of Multi Format Codec using ARM11 MP Core Processor, IJRTER, December 2017.

II) S. Madhu, Design of Low Power and High Speed 4-Bit Ripple Carry Adder Using area efficient full adder cell in 180nm CMOS Process Technology, IJRTER, December 2017.

III) S. Madhu, Ethernet Based Multifunction DAQ using PIC Microcontroller, IJRTER, December 2017.

IV) S. Madhu, Design of Smart Phone health Monitoring Application Based on Wi-Fi Technology International Journal of Eminent Engineering Technologies, in volume 3 issue 3, August 2015.
Conferences / Seminars & Workshops attendedI) Presented a paper on Implementation of Multi Format Codec using ARM11 MP Core Processor in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II) Presented a paper on Design of Low Power and High Speed 4-Bit Ripple Carry Adder Using area efficient full adder cell in 180nm CMOS Process Technology in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III) Presented a paper on Ethernet Based Multifunction DAQ using PIC Microcontroller in an international confernece ICEECCOT-2017 organized by GSSS Institute of Engineering and Technology for Women - Karnataka on 15th and 16th December,2017.

IV) One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

V) Three days Faculty Enablement Programme by TASK & Infosys, Hyderabad from 27th to 29th Sep, 2016.

VI) One week workshop on 8051 Microcontrollers - Programming & Applications by ATI – Ramanthapur, Hyderabad from 30th November to 4th December, 2015.
Projects GuidedI) B. Tech – 8

II) M. Tech – 4
Any Industry ExperienceEmbedded Software Labs, One year, Ammerpet 2011-2012
Mrs.Gangula Swathi-Assistant Professor
 12-G Swathi
QualificationM.Tech (VLSI)
Email Id swathi.g@nnrg.edu.in
Teaching Experience (in Years)8 years
Education InformationI.M. Tech (VLSI) from CMRIT, Hyderabad in 2012.

II.B. Tech (ECE) from VBIT, Jangaon in 2006.
Area of SpecializationVLSI
Papers Published1.G. Swathi, Area and power efficient design of edge triggered D-Flip flop using GDI technique, IJRTER, December 2017.

2.G. Swathi, Intelligent Ambulance with traffic control for monitoring the biomedical parameters, IJRTER, December 2017.


3.G. Swathi, Parallel 2D MRI Image Filtering Algorithms Implementation for FPGA using MATLAB & Xilinx System Generator, IJERA, Volume 2 Issue 6 December 2012.
Subjects Handled1.Electronic devices and circuits

2.Switching theory and logic design

3.Electromagnetic Theory & Transmission lines

4.Pulse & Digital Circuits

5.Analog Communications

6.Digital Communications.

7.Antennas & Wave Propogation
Conferences / Seminars & Workshops attended1.Presented a paper on Area and power efficient design of edge triggered D-Flip flop using GDI technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

2.Presented a paper on Intelligent Ambulance with traffic control for monitoring the biomedical parameters in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

3.One week workshop on Digital and Analog VLSI Design using CADENCE Tools at CVR College of engineering, Hyderabad from 5th to 10th June, 2017.

4.One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.
MembershipMISTE
Ms. Samarla Shilpa, Assistant Professor
7-S shilpa
QualificationM.Tech
E-mail Idshilpa.s@nnrg.edu.in
Teaching Experience 4.6 years
Education InfromationI. M. Tech (VLSI System Design) from Nalla Malla Reddy Engineering college, Hyderabad in 2012.

II. B. Tech (ECE) from CVR College of Engineering, Hyderabad in 2007.
Area of SpecializationVLSI Design
Subjects handled I. Electronic devices and circuits

II. Microprocessor and Microcontroller

III. Electronic Circuits

IV. Linear and Integrated Circuit Design

V. VLSI Design

VI. Low Power VLSI

VII. CPLD and FPGA architecture and applications.
Papers PublishedI. S. Shilpa, Design and Analysis of Carry Look Ahead Adder using 180nm Technology, IJRTER, December 2017.

II. S. Shilpa, An Efficient Design of Low Power and Low Leakage Class-AB CMOS Amplifier using Gating Technique, IJRTER, December 2017.

III. S. Shilpa, ADS-B is Vulnerable to Location Spoofing Attacks and Countermeasure, IJRTER, December 2017.

IV. S. Shilpa, An Efficient Circular convolution using Higher Radix-256 Booth Encoding Algorithm, IJRTER, December 2017.

V. S. Shilpa, An Implementation of Rail to Rail Differential Amplifier for Wide Linear Output Range, IJRTER, December 2017.

VI. S. Shilpa, An Efficient Linear Convolution using Higher Radix Booth Encoding Algorithm, IJESAR, Volume 3 Issue 06 Nov-Dec 2017.

VII. S. Shilpa, Design and Analysis of High Gain Differential Amplifier Using Various Topologies, IRJET, Volume 4 Issue 05 May 2017.
Conferences / Seminars attendedI. Presented a paper on Design and Analysis of Carry Look Ahead Adder using 180nm Technology in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II. Presented a paper on An Efficient Design of Low Power and Low Leakage Class-AB CMOS Amplifier using Gating Technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III. Presented a paper on ADS-B is Vulnerable to Location Spoofing Attacks and Countermeasure in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

IV. Presented a paper on An Efficient Circular convolution using Higher Radix-256 Booth Encoding Algorithm in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

V. Presented a paper on An Implementation of Rail to Rail Differential Amplifier for Wide Linear Output Range in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

VI. One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

VII. One week workshop on LABVIEW Based System Design for Multi Disciplinary Research Application at CVR College of engineering, Hyderabad from 21st to 25th November, 2016.

VIII. One week workshop on PIC Micro Controllers-Programming & Applications by ATI – Ramanthapur, Hyderabad from 23rd to 27th November, 2015.
Projects GuidedI. B. Tech – 8

II. M. Tech – 3
M.Ravi, ASSISTANT PROFRESSOR
 Ravi_ECE
Faculty name:M.Ravi
Qualification:M.Tech
Teaching Experience: 4.5 years
E-mail Id :ravi.m@nnrg.edu.in, ravi0185@gmail.com
Education Information:I. M. Tech (VLSI System Design) from CVSR Institute of Science & Technology, Hyderabad in 2013.

II. B. Tech (ECE) from Nagarjuna Institute of Science & Technology, Nalgonda in 2009.
Area of SpecializationVLSI Design
Subjects HandledElectronic devices and circuits

II. Switching theory and logic design

III. VLSI Design
Ms. Ch.P.N.S.Sujitha, Assistant Professor
6-CH P N S Sujitha
QualificationM.Tech
E-mail Idpnssujitha.ch@nnrg.edu.in
Teaching Experience 5 years 6 months
Education InfromationI. M. E (Embedded Systems and VLSI Design) from MVSR Engineering college, Hyderabad in 2013.

II. B. Tech (ECE) from SRTIST, Nalgonda in 2010.
Area of SpecializationEmbedded Systems and VLSI Design
Subjects handled I. Electronic devices and circuits

II. Switching theory and logic design

III. Digital Design Through Verilog
IV. Controls systems

V. Microprocessor and Microcontroller

VI. Embedded Systems

VII. Wireless communication network

VIII. VLSI Design

IX. Digital Image Processing

X. CPLD and FPGA architecture and applications.
Papers PublishedCh. P. N. S. Sujitha, Design and Analysis of Carry Look Ahead Adder using 180nm Technology, IJRTER, December 2017.

2. Ch. P. N. S. Sujitha, An Efficient Design of Low Power and Low Leakage Class-AB CMOS Amplifier using Gating Technique, IJRTER, December 2017.

3. Ch. P. N. S. Sujitha, Raspberry Pi Based Real Time Data Acquisition Node For Environmental Data Collection, IJRTER, December 2017.

4. Ch. P. N. S. Sujitha, Real Time Vehicle Monitoring and Tracking System using Android Application, IJETT, Volume 4 Issue 9 September 2016.

5. Ch. P. N. S. Sujitha, Design and Analysis of Ring Oscillator by Using 22nm Technology, IJESC, September 2015.

6. Ch. P. N. S. Sujitha, Design Developing CMOS Camera & USB Device Drivers in LINUX 2.6.32, IJECCT, Volume 3 Issue 4 July 2013.
Conferences / Seminars attendedI. Presented a paper on Design and Analysis of Carry Look Ahead Adder using 180nm Technology in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II. Presented a paper on An Efficient Design of Low Power and Low Leakage Class-AB CMOS Amplifier using Gating Technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III. Presented a paper on Raspberry PI Based Real Time Data Acquisition Node For Environmental Data Collection in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

IV. One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

V. Three days Faculty Enablement Programme by TASK & Infosys, Hyderabad from 27th to 29th Sep, 2016.

VI. One week workshop on 8051 Microcontrollers - Programming & Applications by ATI – Ramanthapur, Hyderabad from 30th November to 4th December, 2015.

VII. One day Digital Literacy Trainer’s Programme by TITA & NNRESGI, Hyderabad on 26th Sep, 2015.
Projects GuidedI) B.Tech – 7

II) M.Tech - 3
Any Industry ExperienceIntern at VYAS Informatics, Hyderabad from September 2012 to July 2013.
Ms. Saraswathi S, Assistant Professor
Ms. SIRIKONDA SARASWATHI. ASST
QualificationM.Tech
E-mail Idsaraswathi.s@nnrg.edu.in
Teaching Experience 6 years
Education InfromationI. M. Tech (Embedded Systems) from CBTV, Hyderabad in 2013.

II. B. Tech (ECE) from BRECW, Hyderabad in 2008.
Area of SpecializationEmbedded System
Subjects handled I. Electronic devices and circuits

II. Microprocessor and Microcontroller

III. Embedded Systems
IV. Electronic Measurements and Instrumentation

V. Wireless communication network

VI. Satellite communication

VII. Cellular mobile communication
Papers PublishedS.Saraswathi “Vehicle speed monitoring and automatic toll collection system on highway” National journal in JCT Journals, Sep 2013.
Conferences / Seminars & Workshops attendedOne week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

II. One week workshop on 8051 Microcontrollers - Programming & Applications by ATI – Ramanthapur, Hyderabad from 23rd November to 27th November, 2015
Projects GuidedI. B. Tech – 7

II. M. Tech – 3
Mr. A.ROHIT YADAV, ASSISTANT PROFESSOR
 Rohith_ECE
Faculty name:Mr. A.ROHIT YADAV
Qualification:M. E
Teaching Experience: 3.5 years
E-mail Id :rohit47474@gmail.com
Area ofSpecialization: Embedded systems and VLSI Design
Education Information:I. M. E (Embedded Systems and VLSI Design) from MVSR Engineering college, Hyderabad in 2013.

II. B. Tech (ECE) from VIST Engineering college in 2011.
Subjects HandledI. Electronic devices and circuits

II. Switching theory and logic design

III. Microprocessor and Microcontroller

IV. Embedded Systems

V. VLSI Design
Conferences / Seminars attended:I. Presented a paper on Monitoring and Controlling the Crop Field using Zigbee Networks in the 3rd national conference Modern Trends in Electronic Communication & Signal Processing 2013.
Ms. Vulpala Madhavi, Assistant Professor
Ms. VULPALA MADHAVI. Asst
QualificationM.Tech
E-mail Idmadhavi.v@nnrg.edu.in
Teaching Experience 3 years 2 months
Education InfromationM. Tech (VLSI & Embedded Systems) from Malla Reddy Institute of Science and Technology, Hyderabad in 2014.

II. B. Tech (ECE) from HMIST, Bogaram in 2012.
Area of SpecializationVLSI & Embedded systems
Subjects handled I. Microprocessor and Microcontroller

II. Embedded Systems

III. Wireless communication network

IV. Cellular mobile communication
Projects GuidedB. Tech – 2
Mr A.SATHISH-Assistant Professor
 14-A Satish
QualificationM.Tech
Email Idsatish.a@nnrg.edu.in
Teaching Experience (in Years)2 years 4 months
Education InformationM. Tech (VLSI and Embedded Systems) from SRIT, Khammam in 2015.

II. B. Tech (ECE) from SRIT, Khammam in 2012.
Area of SpecializationVLSI and Embedded Systems
Subjects HandledI. Electronic devices and circuits

II. Electronic Circuit Analysis

III. Microprocessor and Microcontroller

IV. Embedded Systems design

V. Wireless communication network

VI. VLSI Design

VII. Electric Circuits

VIII. CMOS Mixed Signal Design

IX. Embedded Real Time Operating System.
Papers PublishedI. A. Satish, Design and Implementation of Health care system based on IOT, IJRTER, December 2017.

II. A. Satish, Wi-Fi Based Smart Home Automation Using Raspberry Pi, IJRTER, December 2017.

III. A. Satish, Near Field Communication on Raspberry Pi, IRJET, Volume 4 Issue 08 August 2017.

IV. A. Satish, Design and Development of ARM7 Based Real-Time Industry Automation System using Sensors & GSM, Austin, Volume 3 Issue 01 July 2017.
Conferences / Seminars & Workshops attendedI. Presented a paper on Design and Implementation of Health care system based on IOT in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II. Presented a paper on Wi-Fi Based Smart Home Automation Using Raspberry Pi in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III. One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

IV. Two days workshop on Robotryst-2012 by IIT-Kharagpur, 2012.
Projects GuidedB. Tech – 4
Any Industry ExperienceEmbedded Engineer at Innovative Technologies, Hyderabad from July 2012 to September 2013.
ANJANEYULU BORELLI,Assistant Professor
 8-B Anjaneyulu
QualificationM.Tech
Email Idanjaneyulu.b@nnrg.edu.in
Teaching Experience (in Years)1 years 7 months
Education InformationM. Tech (VLSI System Design) from GRRIT, Hyderabad in 2016.

II. B. Tech (ECE) from VBIT, Jangaon in 2010.
Area of SpecializationVLSI
Subjects Handled1. Switching Theory and Logic Design

2. Pulse and Digital Circuits

3. Micro Processors and Micro Controllers

4. Signals and Systems

5. VLSI
Papers Published1. B. Anjaneyulu, Design of low complexity Modified Viterbi Decoder for a Wi-Fi Receiver, IJRTER, December 2017.

2. B. Anjaneyulu, Braun’s Multiplier Implementation using Ripple Carry Adder, Kogge-Stone Adder and 14-transistor novel ADDER, IJRTER, December 2017.

3. B. Anjaneyulu, Energy Saving Transmission for LTE Base station Based on optimized rate and power control, IJR, December 2017.

4. B. Anjaneyulu, A new approach for Reduced Design of Secure Differential Logic Gates for DPA Resistant Circuits, IJR, Volume 4 Issue 14 November 2017.

5. B. Anjaneyulu, Ultralarge-scale system-on-chip Architectures using scan test bandwidth management, IJRD, Volume 4 Issue 7 November 2017.

6. B. Anjaneyulu, Design of Test Compression Capabilities based Programmable PRPG with Low Power, IJGSE, Volume 5 Issue 8 August 2017.

7. B. Anjaneyulu, Detection of soft error in 64-bit register file using self immunity technique, IJATIRD, Volume 7 Issue 1 October 2015.
Conferences / Seminars & Workshops attendedI.Presented a paper on Design of low complexity Modified Viterbi Decoder for a Wi-Fi Receiver in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II.Presented a paper on Braun’s Multiplier Implementation using Ripple Carry Adder, Kogge-Stone Adder and 14-transistor novel ADDER in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III.One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.
Mr.RAJU P,Assistant Professor
 9-P Raju
QualificationM.Tech
Email Idraju.p@nnrg.edu.in
Teaching Experience (in Years)2 years
Education InformationI. M. Tech (Communication Systems) from Vignana Bharathi Institute of Technology, Hyderabad in 2016.

II. B. Tech (ECE) from Vidya Bharathi Institute of Technology, Hyderabad in 2008.
Area of SpecializationCommunication Systems
Subjects HandledI. Analog Communications

II. Digital Communications

III. Microwave Engineering
Papers PublishedI. P. Raju, Improvement of conversion efficiency for passive elements converter load in digital circuits, IJRTER, December 2017.

II. P. Raju, IOT based air quality and hazardous event detection helmet for the mining industry, IJRTER, December 2017.

III. P. Raju, High speed and Low power flash ADC using threshold inverter quantization technique, IJRTER, December 2017.

IV. P. Raju, Random Test Pattern Generator for BIST based Test applications with Low Power, IJGSE, Volume 5 Issue 8, August 2017.
Conferences / Seminars & Workshops attendedPresented a paper on Improvement of conversion efficiency for passive elements converter load in digital circuits in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II. Presented a paper on IOT based air quality and hazardous event detection helmet for the mining industry in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III. Presented a paper on High speed and Low power flash ADC using threshold inverter quantization technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

IV. One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.
Mr. MAMILLA NARESH-ASSISTANT PROFESSOR
 10-M Naresh
QualificationM.Tech
Email Idnaresh.m@nnrg.edu.in
Teaching Experience (in Years)2 years
Education InformationI. M. Tech (VLSI and Embedded Systems) from GPREC, Kurnool in 2015.

II. B. Tech (ECE) from ABIT, Kadapa in 2012.
Area of SpecializationVLSI and Embedded Systems
Subjects HandledVLSI Design

II. Digital Design Through Verilog

III. Switching theory and logic design
Papers PublishedI. M. Naresh, Design and Implementation of Health care system based on IOT, IJRTER, December 2017.

II. M. Naresh, Wi-Fi Based Smart Home Automation Using Raspberry Pi, IJRTER, December 2017.

III. M. Naresh, Near Field Communication on Raspberry Pi, IRJET, Volume 4 Issue 08 August 2017.

IV. M. Naresh, Comparative Analysis of 11T and 16T and 28T Full Adder Based 4*4 Wallace Tree Multiplier Using Cadence 180nm Technology, IRJET, Volume 4 Issue 08 August 2017.

V. M. Naresh, Design of Low Power Full Adder Based Wallace Tree Multiplier Using Cadence 180nm Technology, IJIRSET, Volume 6 Issue 05 May 2017.

VI. M. Naresh, Clock gating based low power ALU design, IJSR, Volume 4 Issue 08 August 2015.
Conferences / Seminars & Workshops attendedPresented a paper on Design and Implementation of Health care system based on IOT in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

II. Presented a paper on Wi-Fi Based Smart Home Automation Using Raspberry Pi in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December, 2017.

III. One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.
Projects GuidedB. Tech – 1
Ms. GUJJULA JHANSI-Assistant Professor
 13-G Jhanasi
QualificationM.Tech
Email IdJhansi.g@nnrg.edu.in
Teaching Experience (in Years)1 year
Education InformationI. M. Tech (VLSI&ES) from NNRG Engineering College, Hyderabad in 2016.

II. B. Tech (ECE) from SSIST, Nalgonda in 2014.
Area of SpecializationEmbedded systems and VLSI
Subjects HandledSwitching theory and logic design

II. Integrated Circuits and Its Applications

III. Full Custom Design
Papers Published1. G. Jhansi, High speed and Low power flash ADC using threshold inverter quantization technique, IJRTER, December 2017.

2. G. Jhansi, Improvement of conversion efficiency for passive elements converter load in digital circuits, IJRTER, December 2017.

3. G. Jhansi, IOT based air quality and hazardous event detection helmet for the mining industry, IJRTER, December 2017.

4. G. Jhansi, Design of MIPS based 64-bit RISC processor, IJEAT, Volume 7 Issue 1 October 2017.

5. G. Jhansi, Binary adder using more area efficient and time optimized quantum-dot cellular automata, IJEDR, Volume 5 Issue 4 October 2017.

6. G. Jhansi, Better efficiency Curve-let based image fusion, IJIRSET, Volume 6 Issue 9 September 2017.

7. G. Jhansi, Serial type daisy chain memory register using pulsed latch, IJSEC, Volume 7 Issue 9 September 2017.

8. G. Jhansi, Mobile Printer With Bluetooth/Wi-Fi Compatibility Using Raspberry Pi, IJECS, Volume 5 Issue 10 October 2016.
Conferences / Seminars & Workshops attendedPresented a paper on High speed and Low power flash ADC using threshold inverter quantization technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

II. Presented a paper on Improvement of conversion efficiency for passive elements converter load in digital circuits in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

III. Presented a paper on IOT based air quality and hazardous event detection helmet for the mining industry in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

IV. One week workshop on Digital and Analog VLSI Design using CADENCE Tools at CVR College of engineering, Hyderabad from 5th to 10th June, 2017.

V. One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.
Miss. SHAIK SHAFIYA-Assistant Professor
 15-Shafiya Shaik
QualificationM.Tech
Email Idshafia.s@nnrg.edu.in
Teaching Experience (in Years)1 year
Education InformationM. Tech (Embedded Systems) from HIMT, Hyderabad in 2015.

II. B. Tech (ECE) from SRIT, Khammam in 2012.
Area of SpecializationEmbedded systems
Subjects HandledEmbedded system design

II. Microprocessor and Microcontroller

III. Wireless communication network
Papers Published1. Sk. Shafiya, Improvement of conversion efficiency for passive elements converter load in digital circuits, IJRTER, December 2017.

2. Sk. Shafiya, IOT based air quality and hazardous event detection helment for the mining industry, IJRTER, December 2017.

3. Sk. Shafiya, High speed and low power flash ADC using threshold inverter quantization technique, IJRTER, December 2017.

4. Sk. Shafiya, An IOT based fire disturbing and verification framework for work house utilizing Raspberry Pi3, IJR, Volume 4 Issue 14 November 2017.

5. Sk. Shafiya, An IOT based intelligent Embedded controlling for mishop counteractive action system for transportation, IJR, Volume 4 Issue 10 October 2017.

6. Sk. Shafiya, Enhanced digital door lock security system by using RFID &GSM, IJIRT, September 2017

7. Sk. Shafiya, Automatic home appliances and security of smart home with RFID, SMS, EMAIL and real time algorithm based an IOT, IJIEMR, Volume 6 Issue 7 August 2017.

8. Sk. Shafiya, IOT based agriculture field monitoring and irrigation automation, IJIRT, Volume 4 Issue 4 June 2017.
Conferences / Seminars & Workshops attended1. Presented a paper on IOT based air quality and hazardous event detection helment for the mining industry in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

2. Presented a paper on High speed and low power flash ADC using threshold inverter quantization technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

3. Presented a paper on Improvement of conversion efficiency for passive elements converter load in digital circuits in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

4. One week workshop on Multi disciplinary Applications Using LabView at NNRESGI, Hyderabad from 20th to 25th March, 2017.

5. Two days workshop on Robotryst-2012 by IIT-Kharagpur, 2012
Bandaru Bhavana, Assistant Professor
 ECE_BHAVANA
Qualification M.Tech
Email Idbhavana.a@nnrg.edu.in
Teaching Experience (in Years)6 Months
Education InformationI. M. Tech (Digital Electronics and Communication Systems) from JNTUACEP, Pulivendula in 2016.

II. B. Tech (ECE) from Yogi Vemana University, Proddatur in 2014.
Area of SpecializationDigital Electronics and Communication Systems
I.Switching Theory and Logic Design
Papers Published1. B. Bhavana, Comparative Study of Different ROF Technologies, IJRTER, December 2017.

2. B. Bhavana, Soil Texture Classification and Analysis with Local Ternary Pattern Technique, IJRTER, December 2017.

3. B. Bhavana, Preserving based on Weighted Guided Image Filter, IJSR, June 2016.
Conferences / Seminars & Workshops attendedPresented a paper on Comparative Study of Different ROF Technologies in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.

2. Presented a paper on Soil Texture Classification and Analysis with Local Ternary Pattern Technique in the proceedings of national conference RAECE-2017 organized by NNRG- Hyderabad on 22nd and 23rd December,2017.
Opportunities Telecom-Industry
One-Day- Paripathana”-Circuit-Designing
One Day Workshop hands On Training
“Pradarshana”-Paper-Presentation
Counselling Code
NNRG Counselling Code
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